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Exploiting Instruction-Level Parallelism: A constructive approach (1998)
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BibTeX
@MISC{Santos98exploitinginstruction-level,
author = {Luiz Cládio Villar dos Santos and Op Gezag and Van De Rector Magnificus and Prof. Dr. M. Rem and Villar Santos and Villar Dos Santos and Luiz C},
title = {Exploiting Instruction-Level Parallelism: A constructive approach},
year = {1998}
}
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Abstract
havioral--level specification of the digital system into an architecture consisting of a data path and a control unit. Emerging design problems are prompting the utilization of instruction--level parallelism (ILP), traditionally an object of parallelizing compilers, for the synthesis of digital systems. In this thesis, techniques like code motion, speculation and loop pipelining are employed to expose ILP and their application is oriented to digital systems designed to operate under a global time--constraint. A resource--constrained optimization problem is formulated as a starting point. From a given specification and a set of resource constraints, the goal is to obtain a symbolic finite state machine (FSM) for the control unit of the digital system such as to minimize the schedule length of the critical execution path. An approach is proposed in which several alternative solutions are generated and explored by means of a local search algorithm. For the construction of
Keyphrases
digital system instruction-level parallelism constructive approach control unit critical execution path schedule length design problem architecture consisting data path optimization problem global time constraint starting point loop pipelining symbolic finite state machine resource constraint havioral level specification code motion instruction level parallelism several alternative solution local search algorithm
