BibTeX
@MISC{Jin_needfor,
author = {Lingling Jin},
title = {Need for Topology Aware Program Scheduling on CMP Systems},
year = {}
}
Share
 |
 |
 |
 |
||
OpenURL
Abstract
Current trends in CPU evolution show that more and more cores are being integrated into a single chip for throughput computing. While researchers are exploring the design space to meet some thermal constraints for such CMP platforms, we consider the run-time thermal dissipation to lower peak temperature for cores. We observe that the thermal conduction creates different temperature gradients when different scheduling schemes are used to map programs onto the processor cores. This lateral conduction of heat has more serious implications on the processor life and performance than the vertical heat radiation which is usually taken care of by heat sinks and other cooling mechanisms. We also observe that the temperature of a busy CPU core has an additive effect on the surrounding core temperatures. Multiple busy cores that are topologically close together on the CPU die can potentially raise the CPU temperature above safe operating thresholds. In this paper, we establish the need for topology-aware scheduling algorithms that consider the temperature at any coordinate on the CPU die as a function of the power consumed and the conductance of the die material. This paper intends to seed the research for joint topology and power aware program scheduling algorithms for CMP systems. These algorithms can use established mathematical procedures to solve the temperature equation for lowest peak temperature in order to provide a workload assignment strategy for different cores. Our simulation results have shown that the maximum CPU temperature can be lowered by 4 o C to 10 o C without loss of performance as compared to a thermal-blind scheduling algorithm. The scheduling can be carried out either at the OS level or by any software/hardware entity that manages a platform.
Keyphrases
cmp system topology aware program scheduling peak temperature cpu die cpu temperature current trend design space vertical heat radiation joint topology different temperature gradient thermal constraint temperature equation o level core temperature run-time thermal dissipation topology-aware scheduling algorithm mathematical procedure cpu evolution show power aware program scheduling algorithm workload assignment strategy serious implication die material lateral conduction software hardware entity single chip multiple busy core thermal conduction different core additive effect cmp platform processor life simulation result heat sink different scheduling scheme safe operating threshold busy cpu core maximum cpu temperature thermal-blind scheduling algorithm
