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Hierarchical Finite State Machines with Multiple Concurrency Models
- IEEE Transactions on Computer-aided Design of Integrated Circuits and Systems
, 1999
"... This paper studies the semantics of hierarchical finite state machines (FMS's) that are composed using various concurrency models, particularly dataflow, discrete-events, and synchronous/reactive modeling. It is argued that all three combinations are useful, and that the concurrency model can b ..."
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Cited by 146 (43 self)
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This paper studies the semantics of hierarchical finite state machines (FMS's) that are composed using various concurrency models, particularly dataflow, discrete-events, and synchronous/reactive modeling. It is argued that all three combinations are useful, and that the concurrency model can be selected independently of the decision to use hierarchical FSM's. In contrast, most formalisms that combine FSM's with concurrency models, such as Statecharts (and its variants) and hybrid systems, tightly integrate the FSM semantics with the concurrency semantics. An implementation that supports three combinations is described.
Design of Embedded Systems: Formal Models, Validation, and Synthesis
- PROCEEDINGS OF THE IEEE
, 1999
"... This paper addresses the design of reactive real-time embedded systems. Such systems are often heterogeneous in implementation technologies and design styles, for example by combining hardware ASICs with embedded software. The concurrent design process for such embedded systems involves solving the ..."
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Cited by 127 (9 self)
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This paper addresses the design of reactive real-time embedded systems. Such systems are often heterogeneous in implementation technologies and design styles, for example by combining hardware ASICs with embedded software. The concurrent design process for such embedded systems involves solving the specification, validation, and synthesis problems. We review the variety of approaches to these problems that have been taken.
The Constructive Semantics of Pure Esterel
, 1996
"... Esterel [8, 10, 3, 4] is an imperative synchronous parallel programming lan guage dedicated to reactive systems [17]. Esterel is tailored for programming hardware or software synchronous controllers for which the control-handling aspects are predominant. Esterel programs are input-driven: they wait ..."
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Cited by 116 (2 self)
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Esterel [8, 10, 3, 4] is an imperative synchronous parallel programming lan guage dedicated to reactive systems [17]. Esterel is tailored for programming hardware or software synchronous controllers for which the control-handling aspects are predominant. Esterel programs are input-driven: they wait for inputs and compute corresponding outputs in a cycle-based way. An in put-output computation is called a reaction...
Programmable Active Memories: a Performance Assessment
- Research on Integrated Systems: Proceedings of the 1993 Symposium
, 1993
"... We present some quantitative performance measurements for the computing power of Programmable Active Memories (PAM), as introduced by [BRV 89]. Based on Programmable Gate Array (PGA) technology, the PAM is a universal hardware co-processor closely coupled to a standard host computer. The PAM can spe ..."
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Cited by 113 (8 self)
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We present some quantitative performance measurements for the computing power of Programmable Active Memories (PAM), as introduced by [BRV 89]. Based on Programmable Gate Array (PGA) technology, the PAM is a universal hardware co-processor closely coupled to a standard host computer. The PAM can speed up many critical software applications running on the host, by executing part of the computations through a specific hardware PAM design. The performance measurements presented are based on two PAM architectures and ten specific applications, drawn from arithmetics, algebra, geometry, physics, biology, audio and video. Each of these PAM designs proves as fast as any reported hardware or super-computer for the corresponding application. In cases where we could bring some genuine algorithmic innovation into the design process, the PAM has proved an order of magnitude faster than any previously existing system (see [SBV 91] and [S 92]). 1 PAM concept Like any RAM memory module, a PAM is att...
Representation and Analysis of Reactive Behaviors: A Synchronous Approach
, 1996
"... Reactive systems involve communication, concurrency and preemption. Few models support these three concepts, even less can correctly deal with their coexistence. The synchronous ..."
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Cited by 90 (14 self)
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Reactive systems involve communication, concurrency and preemption. Few models support these three concepts, even less can correctly deal with their coexistence. The synchronous
Constructing Hardware-Software Systems from a Single Description
, 1996
"... The study of computing is split at an early stage between the separate branches that deal with hardware and software; there is also a corresponding split in later professional specialisation. This paper explores the essential unity of the two branches and attempts to point to a common framework with ..."
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Cited by 75 (4 self)
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The study of computing is split at an early stage between the separate branches that deal with hardware and software; there is also a corresponding split in later professional specialisation. This paper explores the essential unity of the two branches and attempts to point to a common framework within which hardware-software codesigns can be expressed as a single executable specification, reasoned about, and transformed into implementations. We also describe a hardware/software co-design environment which has been built, and we show how designs can be realised within this environment. A rapid development cycle is achieved by using FPGAs to host the hardware components of the system. The architecture of a hardware platform for supporting experimental hardware/software co-designs is presented. A particular example of a real-time video processing application built using this design environment is also described. 1 Introduction. Our approach to unifying the traditionally separate discipli...
Communicating Reactive Processes
- In Proceedings of Twentieth ACM Symposium on Principles of Programming Languages
, 1993
"... We present a new programming paradigm called Communicating Reactive Processes or CRP that unifies the capabilities of asynchronous and synchronous concurrent programming languages. Asynchronous languages such as CSP, Occam, or Ada are well-suited for distributed algorithms; their processes are loose ..."
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Cited by 66 (8 self)
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We present a new programming paradigm called Communicating Reactive Processes or CRP that unifies the capabilities of asynchronous and synchronous concurrent programming languages. Asynchronous languages such as CSP, Occam, or Ada are well-suited for distributed algorithms; their processes are loosely coupled and communication takes time. The Esterel synchronous language is dedicated to reactive systems; its processes are tightly coupled and deterministic, communication being realized by instantaneous broadcasting. Complex applications such as process or robot control require to couple both forms of concurrency, which is the object of CRP. A CRP program consists of independent locally reactive Esterel nodes that communicate with each other by CSP rendezvous. CRP faithfully extends both Esterel and CSP and adds new possibilities such as precise local watchdogs on rendezvous. We present the design of CRP, its semantics, a translation into classical process calculi for program verificatio...
The Specification and Execution of Heterogeneous Synchronous Reactive Systems
- University of California, Berkeley
, 1995
"... Electronic systems are becoming more complex. Using subproblem-specific languages simplifies their design, but presents the problem of connecting the parts. I propose a system description scheme for reactive systems (systems that maintain a dialog with their environment) that supports such heterogen ..."
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Cited by 58 (0 self)
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Electronic systems are becoming more complex. Using subproblem-specific languages simplifies their design, but presents the problem of connecting the parts. I propose a system description scheme for reactive systems (systems that maintain a dialog with their environment) that supports such heterogeneity. I expect to contribute the system description scheme, a mathematical framework for it, a set of efficient algorithms for simulating these systems, and a practical implementation of the scheme. My prototype compiler suggests this scheme can be made practical, and the mathematical framework is nearly complete. I expect this work to make designing complex, heterogeneous reactive systems fast and simple. 1 Introduction Electronic systems are growing more complex. Describing these with a diverse set of languages, each suited to a particular subtask, can greatly simplify designing these systems, but the problem of connecting the subtasks arises. For example, a convenient descriptionof the d...
A Formal Specification Model for Hardware/Software Codesign
- In Proc. of the Intl. Workshop on Hardware-Software Codesign
, 1993
"... Embedded controllers for reactive real-time applications are implemented as mixed softwarehardware systems. In this paper we present a model for specification, partitioning, and implementation of such systems. The model, called Codesign Finite State Machines (CFSMs), is based on FSMs and is particul ..."
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Cited by 35 (5 self)
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Embedded controllers for reactive real-time applications are implemented as mixed softwarehardware systems. In this paper we present a model for specification, partitioning, and implementation of such systems. The model, called Codesign Finite State Machines (CFSMs), is based on FSMs and is particularly suited to a specific class of systems with relatively low algorithmic complexity. Pre-existing formal specification languages can be used by the designer to specify the intended behavior of the system and mapped into our model. CFSMs use a non-zero unbounded reaction delay model and hence can be indifferently implemented either in hardware or in software. The implementation only restricts the range of variation of some previously undefined delays, thus preserving formal properties of the specification across implementation refinements. The communication primitive, event broadcasting, is low-level enough to be implemented efficiently and yet general enough to allow higher-level mechanism...
