Results 1 - 10
of
45
The Quest for Efficient Boolean Satisfiability Solvers
, 2002
"... has seen much interest in not just the theoretical computer science community, but also in areas where practical solutions to this problem enable significant practical applications. Since the first development of the basic search based algorithm proposed by Davis, Putnam, Logemann and Loveland (DPLL ..."
Abstract
-
Cited by 149 (3 self)
- Add to MetaCart
(Show Context)
has seen much interest in not just the theoretical computer science community, but also in areas where practical solutions to this problem enable significant practical applications. Since the first development of the basic search based algorithm proposed by Davis, Putnam, Logemann and Loveland (DPLL) about forty years ago, this area has seen active research effort with many interesting contributions that have culminated in state-of-the-art SAT solvers today being able to handle problem instances with thousands, and in same cases even millions, of variables. In this paper we examine some of the main ideas along this passage that have led to our current capabilities. Given the depth of the literature in this field, it is impossible to do this in any comprehensive way; rather we focus on techniques with consistent demonstrated efficiency in available solvers. For the most part, we focus on techniques within the basic DPLL search framework, but also briefly describe other approaches and look at some possible future research directions. 1.
Effective Use of Boolean Satisfiability Procedures in the Formal Verification of Superscalar and VLIW Microprocessors
- Journal of Symbolic Computation
, 2001
"... We compare SAT-checkers and decision diagrams on the evaluation of Boolean formulas produced in the formal verification of both correct and buggy versions of superscalar and VLIW microprocessors. We identify one SAT-checker that significantly outperforms the rest. We evaluate ways to enhance its per ..."
Abstract
-
Cited by 101 (17 self)
- Add to MetaCart
(Show Context)
We compare SAT-checkers and decision diagrams on the evaluation of Boolean formulas produced in the formal verification of both correct and buggy versions of superscalar and VLIW microprocessors. We identify one SAT-checker that significantly outperforms the rest. We evaluate ways to enhance its performance by variations in the generation of the Boolean correctness formulas. We reassess optimizations previously used to speed up the formal verification and probe future challenges.
Satire: A new incremental satisfiability engine
- In Design Automation Conference, 2001. Proceedings
, 2001
"... We introduce SATIRE, a new satisfiability solver that is particularly suited to verification and optimization problems in electronic design automation. SATIRE builds on the most recent advances in satisfiability research, and includes two new features to achieve even higher performance: a facility f ..."
Abstract
-
Cited by 95 (8 self)
- Add to MetaCart
(Show Context)
We introduce SATIRE, a new satisfiability solver that is particularly suited to verification and optimization problems in electronic design automation. SATIRE builds on the most recent advances in satisfiability research, and includes two new features to achieve even higher performance: a facility for incrementally solving sets of related problems, and the ability to handle non-CNF constraints. We provide experimental evidence showing the effectiveness of these additions to classical satisfiability solvers. 1.
The Taming of the (X)OR
- CL 2000
, 2000
"... Many key verification problems such as bounded model-checking, circuit verification and logical cryptanalysis are formalized with combined clausal and affine logic (i.e. clauses with xor as the connective) and cannot be efficiently (if at all) solved by using CNF-only provers. We present a decision ..."
Abstract
-
Cited by 57 (7 self)
- Add to MetaCart
(Show Context)
Many key verification problems such as bounded model-checking, circuit verification and logical cryptanalysis are formalized with combined clausal and affine logic (i.e. clauses with xor as the connective) and cannot be efficiently (if at all) solved by using CNF-only provers. We present a decision procedure to efficiently decide such problems. The Gauss-DPLL procedure is a tight integration in a unifying framework of a Gauss-Elimination procedure (for affine logic) and a Davis-Putnam-Logeman-Loveland procedure (for usual clause logic). The key idea, which distinguishes our approach from others, is the full interaction bewteen the two parts which makes it possible to maximize (deterministic) simplification rules by passing around newly created unit or binary clauses in either of these parts. We show the correcteness and the termination of Gauss-DPLL under very liberal assumptions.
Exploiting the Real Power of Unit Propagation Lookahead
, 2001
"... One of the best SAT solvers for random 3-SAT formulae, SATZ, is based on a heuristic called unit propagation lookahead (UPL). Unfortunately, it does not perform so well on specific structured instances, especially on the ones coming from an area where a huge interest for SAT has emerged in rece ..."
Abstract
-
Cited by 32 (1 self)
- Add to MetaCart
One of the best SAT solvers for random 3-SAT formulae, SATZ, is based on a heuristic called unit propagation lookahead (UPL). Unfortunately, it does not perform so well on specific structured instances, especially on the ones coming from an area where a huge interest for SAT has emerged in recent years: symbolic model checking (SMC). We claim that all the power of this heuristic is not used in SATZ, and that UPL can be extended to solve some real world structured problems, where the major competitors are using intelligent backtracking or specific deduction rules. We introduce a preprocessing technique that can be applied to simplify instances containing equivalent literals. This technique is based on UPL, so it can be easily added to any solver using this heuristic. We compare our approach to the new extension of SATZ for equivalency reasoning (EqSATZ) and another approach, the St almarck method, which is mainly used in SMC.
Qubos: Deciding Quantified Boolean Logic using Propositional Satisfiability Solvers
- In Proc. 4 th Intl. Conf. on Formal Methods in Computer-Aided Design (FMCAD’02), volume 2517 of LNCS
, 2002
"... We describe Qubos (QUantified BOolean Solver), a decision procedure for quantified Boolean logic. The procedure is based on nonclausal simplification techniques that reduce formulae to a propositional clausal form after which o#-the-shelf satisfiability solvers can be employed. We show that ther ..."
Abstract
-
Cited by 29 (0 self)
- Add to MetaCart
(Show Context)
We describe Qubos (QUantified BOolean Solver), a decision procedure for quantified Boolean logic. The procedure is based on nonclausal simplification techniques that reduce formulae to a propositional clausal form after which o#-the-shelf satisfiability solvers can be employed. We show that there are domains exhibiting structure for which this procedure is very e#ective and we report on experimental results.
Approximating Minimal Unsatisfiable Subformulae by Means of Adaptive Core Search
- Discrete Applied Mathematics
, 2002
"... The paper is concerned with the relevant practical problem of selecting a small unsatisfiable subset of clauses inside an unsatisfiable CNF formula. Moreover, it deals with the algorithmic problem of improving an enumerative (DPLL-style) approach to SAT, in order to overcome some structural defects ..."
Abstract
-
Cited by 29 (1 self)
- Add to MetaCart
The paper is concerned with the relevant practical problem of selecting a small unsatisfiable subset of clauses inside an unsatisfiable CNF formula. Moreover, it deals with the algorithmic problem of improving an enumerative (DPLL-style) approach to SAT, in order to overcome some structural defects of such approach. Within a complete solution framework, we are able to evaluate the di#culty of each clause, by analyzing the history of the search. Such clause hardness evaluation is used in order to rapidly select an unsatisfiable subformula (of the given CNF) which is a good approximation of a minimal unsatisfiable subformula (MUS). Unsatisfiability is proved by solving only such subformula. Very small unsatisfiable subformulae are detected inside famous Dimacs unsatisfiable problems and in real world problems. Comparison with the very e#cient solver SATO 3.2 used as a state-of-the-art DPLL procedure (disabling learning of new clauses) shows the e#ectiveness of such enumeration guide.
Boolean satisfiability in electronic design automation
- Design Automation Conf
, 2000
"... Boolean Satisfiability (SAT) is often used as the underlying model for a significant and increasing number of applications in Electronic Design Automation (EDA) as well as in many other fields of Computer Science and Engineering. In recent years, new and efficient algorithms for SAT have been devel ..."
Abstract
-
Cited by 27 (0 self)
- Add to MetaCart
(Show Context)
Boolean Satisfiability (SAT) is often used as the underlying model for a significant and increasing number of applications in Electronic Design Automation (EDA) as well as in many other fields of Computer Science and Engineering. In recent years, new and efficient algorithms for SAT have been developed, allowing much larger problem instances to be solved. SAT “packages” are currently expected to have an impact on EDA applications similar to that of BDD packages since their introduction more than a decade ago. This tutorial paper is aimed at introducing the EDA professional to the Boolean satisfiability problem. Specifically, we highlight the use of SAT models to formulate a number of EDA problems in such diverse areas as test pattern generation, circuit delay computation, logic optimization, combinational equivalence checking, bounded model checking and functional test vector generation, among others. In addition, we provide an overview of the algorithmic techniques commonly used for solving SAT, including those that have seen widespread use in specific EDA applications. We categorize these algorithmic techniques, indicating which have been shown to be best suited for which tasks.
Investigating a general hierarchy of polynomially decidable classes of CNF's based on short tree-like resolution proofs
, 1999
"... We investigate a hierarchy Gk (U ; S) of classes of conjunctive normal forms, recognizable and SAT-decidable in polynomial time, with special emphasize on the corresponding hardness parameter hU ;S (F ) for clausesets F (the first level of inclusion). At level 0 an (incomplete, poly-time) oracl ..."
Abstract
-
Cited by 24 (14 self)
- Add to MetaCart
We investigate a hierarchy Gk (U ; S) of classes of conjunctive normal forms, recognizable and SAT-decidable in polynomial time, with special emphasize on the corresponding hardness parameter hU ;S (F ) for clausesets F (the first level of inclusion). At level 0 an (incomplete, poly-time) oracle U for unsatisfiability detection and an oracle S for satisfiability detection is used. The hierarchy from [Pretolani 96] is improved in this way with respect to strengthened satisfiability handling, simplified recognition and consistent relativization. Also a hierarchy of canonical poly-time reductions with Unit-clause propagation at the first level is obtained. General methods for upper and lower bounds on hU ;S (F ) are developed and applied to a number of well-known examples. hU ;S (F ) admits several different characterizations, including the space complexity of tree-like resolution and the use of pebble games as in [Esteban, Tor'an 99]. Using for S the class of linearly sat...
