We present a formal model for concurrent systems. The model represents synchronous and asynchronous components in a uniform framework that supports compositional (assume-guarantee) and hierarchical (stepwise-refinement) design and verification. While synchronous models are based on a notion of atomic computation step, and asynchronous models remove that notion by introducing stuttering, our model is based on a flexible notion of what constitutes a computation step: by applying an abstraction operator to a system, arbitrarily many consecutive steps can be collapsed into a single step. The abstraction operator, which may turn an asynchronous system into a synchronous one, allows us to describe systems at various levels of temporal detail. For describing systems at various levels of spatial detail, we use a hiding operator that may turn a synchronous system into an asynchronous one. We illustrate the model with diverse examples from synchronous circuits, asynchronous shared-m...

Esterel [8, 10, 3, 4] is an imperative synchronous parallel programming lan guage dedicated to reactive systems [17]. Esterel is tailored for programming hardware or software synchronous controllers for which the control-handling aspects are predominant. Esterel programs are input-driven: they wait for inputs and compute corresponding outputs in a cycle-based way. An in put-output computation is called a reaction...

System design based on the so-called "synchronous hypothesis" consists of abstracting non-functional implementation details of a system and lets one benefit from a focused reasoning on the logics behind the instants at which system functionalities should be secured, providing ease to generating synchronous circuits and verifying their functionalities using compilers and tools that implement this approach. In the relational model of the design language Signal, this affinity goes beyond the domain of purely synchronous circuits and embraces the context of complex architectures consisting of synchronous circuits and desynchronization protocols: Gals architectures. The unique features of Signal are to provide the notion of polychrony: the capability to describe circuits and systems with several clocks; to support refinement: the ability to assist and support system design from the early stages of requirement specification, to the later stages of synthesis and deployment. The Signal model provides a design methodology that forms a continuum from synchrony to asynchrony, from specification to implementation, from abstraction to concretization, from interfaces to implementations. Signal gives the opportunity to seamlessly model circuits and devices at multiple levels of abstractions, by implementing mechanisms found in many hardware simulators, while reasoning within a simple and formally defined mathematical model. In the same manner, the flexibility inherent to the abstract notion of signal handled in the polychronous design model of Signal invites and favors the design of correct by construction systems by means of well-defined transformations of system specifications that preserve the intended semantics and stated properties of the architecture under design. The aim of the presen...

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A central challenge in computer science and knowledge representation is the integration of conceptual frameworks for continuous and discrete change, as exemplified by the theory of differential equations and real analysis on the one hand, and the theory of programming languages on the other. We take the first steps towards such an integrated theory by presenting a recipe for the construction of continuous programming languages --- languages in which state dynamics can be described by differential equations. The basic idea is to start with an untimed language and extend it uniformly over dense (real) time. We present a concrete mathematical model and language (the Hybrid concurrent constraint programming model, Hybrid cc) instantiating these ideas. The language is intended to be used for modeling and programming hybrid systems. The language is declarative --- programs can be understood as formulas that place constraints on the (temporal) evolution of the system, with parallel compositio...

ESTEREL is a formally-defined language designed for programming reactive systems; namely, those that maintain a permanent interaction with their environment. The AT&T 5ESS telephone switching system is an example of a legacy reactive system. As a case study, we describe an implementation in ESTEREL of one feature of a 5ESS switch; this implementation has been tested in the 5ESS switch simulator. Furthermore, it has been formally verified that this implementation satisfies some safety properties required for telecommunications applications. Our case study provides some evidence that ESTEREL is suitable for programming legacy reactive systems, and that it may afford significant advantages in software development over more traditional programming languages used in industrial settings.

This paper presents SignalGT ', the encoding and implementation of an extension to the reactive data flow language Signal with constructs for hierarchical task preemption. Tasks are defined as the association of a data-flow process with a time interval on which it is executed. The motivation for introducing these preemption structures is the need for the specification of different modes of interactions with the environment, and transitions between them (i.e. sequencing) in a nested way, especially in complex applications like robotics and discrete event control systems. A pre-processor to the Signal compiler implements the encoding of the new constructs in the dataflow framework. This way, both data-flow and tasking paradigms are available within the same language-level framework, and the tools of the Signal environment for optimization, simulation or proof are available. 1 Motivation Context. The work presented in this paper takes place in the framework of the synchronous approach ...

Abstract. Real-time programming is a software engineering discipline that has been around ever since the dawn of digital computing. The dream of real-time programmers is to unlock the virtually unlimited potential of software for embedded computer systems — digital computers that are supposed to behave like analog devices. The perfect embedded computer system is invisibly hybrid, it works according to the largely unidentified laws of embedded software but acts according to the laws of physics. The critical interface between embedded software and physics is real-time and yet, while physical processes evolve in real-time, software processes do not. Only the embedded computer system as a whole — embedded software and hardware — determines a complex notion of so-called soft-time to which the software processes adhere: mapping softtime to real-time is the art of real-time programming. We discuss various real-time programming models that support the development of real-time programs based on different abstractions of soft-time. We informally introduce a real-time process model to study (1) the compositionality of the real-time programming models and (2) the semantics of real-time programs developed in these models. 1

To explore different points in the design space of an embedded system, it is important to be able to compose a design from reusable design components, and then map the resulting system description onto several possible target architectures with different partitionings of functionality. Today’s specification models support composition styles that work well for data communication but not for control communication between concurrent processes to be mapped onto a distributed architecture. We propose a new retargetable system specification model that combines the best properties of process-based and hierarchical-FSM-based methods for modular composition of data and control. The model lends itself to automated synthesis of the run-time system for coordinating tasks on different processors in the system. The model and synthesis method are illustrated with several examples of embedded systems. 1