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Scalable Vector Media-processors for Embedded Systems

by Christoforos Kozyrakis , 2002
"... Over the past twenty years, processor designers have concentrated on superscalar and VLIW architectures that exploit the instruction-level parallelism (ILP) available in engineering applications for workstation systems. Recently, however, the focus in computing has shifted from engineering to multim ..."
Abstract - Cited by 40 (3 self) - Add to MetaCart
to multimedia applications and from workstations to embedded systems. In this new computing environment, the performance, energy consumption, and development cost of ILP processors renders them ineffective despite their theoretical generality. This thesis

MediaBench: A Tool for Evaluating and Synthesizing Multimedia and Communications Systems

by Chunho Lee, Miodrag Potkonjak, William H. Mangione-smith
"... Over the last decade, significant advances have been made in compilation technology for capitalizing on instruction-level parallelism (ILP). The vast majority of ILP compilation research has been conducted in the context of generalpurpose computing, and more specifically the SPEC benchmark suite. At ..."
Abstract - Cited by 966 (22 self) - Add to MetaCart
. At the same time, a number of microprocessor architectures have emerged which have VLIW and SIMD structures that are well matched to the needs of the ILP compilers. Most of these processors are targeted at embedded applications such as multimedia and communications, rather than general-purpose systems

A Media-Enhanced Vector Architecture for Embedded Memory Systems

by Christoforos Kozyrakis , 1999
"... Next generation portable devices will require processors with both low energy consumption and high performance for media functions. At the same time, modern CMOS technology creates the need for highly scalable VLSI architectures. Conventional processor architectures fail to meet these requirements. ..."
Abstract - Cited by 31 (2 self) - Add to MetaCart
Next generation portable devices will require processors with both low energy consumption and high performance for media functions. At the same time, modern CMOS technology creates the need for highly scalable VLSI architectures. Conventional processor architectures fail to meet these requirements

Portable, Flexible, and Scalable Soft Vector Processors

by Peter Yiannacouras, J. Gregory Steffan, Senior Member, Jonathan Rose
"... Abstract—Field-programmable gate arrays (FPGAs) are increasingly used to implement embedded digital systems, however, the hardware design necessary to do so is time-consuming and tedious. The amount of hardware design can be reduced by employing a microprocessor for less-critical computation in the ..."
Abstract - Cited by 3 (0 self) - Add to MetaCart
. To this end we propose extending soft processors with vector extensions to exploit the abundant data parallelism found in many embedded kernels. Such a soft vector processor can execute these kernels much faster than a single-core hence reducing the need for hardware implementations. We observe this improved

SCALABLE VECTOR PROCESSORS FOR EMBEDDED SYSTEMS FOR EMBEDDED APPLICATIONS WITH DATA-LEVEL PARALLELISM, A VECTOR PROCESSOR OFFERS HIGH PERFORMANCE AT LOW POWER CONSUMPTION AND LOW DESIGN COMPLEXITY. UNLIKE SUPERSCALAR AND VLIW DESIGNS, A VECTOR PROCESSOR I

by Christoforos E, David A. Patterson
"... Designers of embedded processors have typically optimized for low power consumption and low design complexity to minimize cost. Performance was a secondary consideration. Nowadays, many embedded systems (set-top boxes, game consoles, personal digital assistants, and cell phones) commonly perform com ..."
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Designers of embedded processors have typically optimized for low power consumption and low design complexity to minimize cost. Performance was a secondary consideration. Nowadays, many embedded systems (set-top boxes, game consoles, personal digital assistants, and cell phones) commonly perform

The new casper: Query processing for location services without compromising privacy

by Chi-Yin Chow , Mohamed F. Mokbel, Walid G. Aref - IN PROC. OF THE 32ND INTERNATIONAL CONFERENCE ON VERY LARGE DATA BASES, VLDB , 2006
"... In this paper, we present a new privacy-aware query processing framework Capser * in which mobile and stationary users can obtain snapshot and/or continuous location-based services without revealing their private location information. In particular, we propose a privacy-aware query processor embedde ..."
Abstract - Cited by 234 (7 self) - Add to MetaCart
be tuned through two parameters to trade off between system scalability and answer optimality. Experimental results show that our query processor achieves high quality snapshot and continuous location-based services while

Vespa: Portable, scalable, and flexible fpga-based vector processors

by Peter Yiannacouras, J. Gregory Steffan, Jonathan Rose - In CASES’08: International Conference on Compilers, Architecture and Synthesis for Embedded Systems , 2008
"... While soft processors are increasingly common in FPGAbased embedded systems, it remains a challenge to scale their performance. We propose extending soft processor instruction sets to include support for vector processing. The resulting system of vectorized software and soft vector processor hardwar ..."
Abstract - Cited by 25 (5 self) - Add to MetaCart
While soft processors are increasingly common in FPGAbased embedded systems, it remains a challenge to scale their performance. We propose extending soft processor instruction sets to include support for vector processing. The resulting system of vectorized software and soft vector processor

FAWN: A Fast Array of Wimpy Nodes

by David G. Andersen, Jason Franklin, Amar Phanishayee, Lawrence Tan, Vijay Vasudevan , 2008
"... This paper introduces the FAWN—Fast Array of Wimpy Nodes—cluster architecture for providing fast, scalable, and power-efficient key-value storage. A FAWN links together a large number of tiny nodes built using embedded processors and small amounts (2–16GB) of flash memory into an ensemble capable of ..."
Abstract - Cited by 212 (26 self) - Add to MetaCart
This paper introduces the FAWN—Fast Array of Wimpy Nodes—cluster architecture for providing fast, scalable, and power-efficient key-value storage. A FAWN links together a large number of tiny nodes built using embedded processors and small amounts (2–16GB) of flash memory into an ensemble capable

XGRID: A Scalable Many-Core Embedded Processor

by Volkan Gunes, Volkan Gunes, Tony Givargis , 2013
"... The demand for compute cycles needed by embedded systems is rapidly increasing. Due to the limitations of single-core processors, a move towards multi-core architectures is unavoidable. In this paper, we introduce the XGRID embedded many-core system-on-chip architecture. XGRID makes use of a novel, ..."
Abstract - Cited by 1 (1 self) - Add to MetaCart
The demand for compute cycles needed by embedded systems is rapidly increasing. Due to the limitations of single-core processors, a move towards multi-core architectures is unavoidable. In this paper, we introduce the XGRID embedded many-core system-on-chip architecture. XGRID makes use of a novel

Hardware/Compiler Codevelopment for an Embedded Media

by Christoforos Kozyrakis, David Judd, Joseph Gebis, Samuel Williams, David Patterson, Katherine Yelick - PROCEEDINGS OF THE IEEE , 2001
"... Embedded and portable systems running multimedia applications create a new challenge for hardware architects. A microprocessor for such applications needs to be easy to program like a general-purpose processor and have the performance and power efficiency of a digital signal processor. This paper pr ..."
Abstract - Cited by 12 (2 self) - Add to MetaCart
performance, low power consumption, and reduced design complexity. It also leads to a compiler model that is efficient both in terms of performance and executable code size. The memory system for the vector processor is implemented using embedded DRAM technology, which provides high bandwidth in an integrated
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