Results 1 - 10 of 865

Scalable error detection using Boolean satisfiability

by Yichen Xie, Alex Aiken - In Proc. 32Ç È POPL. ACM , 2005
"... We describe a software error-detection tool that exploits recent advances in boolean satisfiability (SAT) solvers. Our analysis is path sensitive, precise down to the bit level, and models pointers and heap data. Our approach is also highly scalable, which we achieve using two techniques. First, for ..."
Abstract - Cited by 118 (10 self) - Add to MetaCart
We describe a software error-detection tool that exploits recent advances in boolean satisfiability (SAT) solvers. Our analysis is path sensitive, precise down to the bit level, and models pointers and heap data. Our approach is also highly scalable, which we achieve using two techniques. First

SATURN: A Scalable Framework for Error Detection Using Boolean Satisfiability

by Yichen Xie, Alex Aiken
"... This article presents SATURN, a general framework for building precise and scalable static error detection systems. SATURN exploits recent advances in Boolean satisfiability (SAT) solvers and is path sensitive, precise down to the bit level, and models pointers and heap data. Our approach is also hi ..."
Abstract - Cited by 49 (0 self) - Add to MetaCart
This article presents SATURN, a general framework for building precise and scalable static error detection systems. SATURN exploits recent advances in Boolean satisfiability (SAT) solvers and is path sensitive, precise down to the bit level, and models pointers and heap data. Our approach is also

Duplicate Record Detection: A Survey

by Ahmed K. Elmagarmid, Panagiotis G. Ipeirotis, Vassilios S. Verykios , 2007
"... Often, in the real world, entities have two or more representations in databases. Duplicate records do not share a common key and/or they contain errors that make duplicate matching a difficult task. Errors are introduced as the result of transcription errors, incomplete information, lack of standa ..."
Abstract - Cited by 448 (11 self) - Add to MetaCart
of standard formats, or any combination of these factors. In this paper, we present a thorough analysis of the literature on duplicate record detection. We cover similarity metrics that are commonly used to detect similar field entries, and we present an extensive set of duplicate detection algorithms

Shatter: Efficient Symmetry-Breaking for Boolean Satisfiability

by Fadi A. Aloul, et al. - DAC 2003 , 2003
"... Boolean satisfiability (SAT) solvers have experienced dramatic improvements in their performance and scalability over the last several years [5, 7] and are now routinely used in diverse EDA applications. Nevertheless, a number of practical SAT instances remain difficult to solve [9] and continue to ..."
Abstract - Cited by 42 (12 self) - Add to MetaCart
Boolean satisfiability (SAT) solvers have experienced dramatic improvements in their performance and scalability over the last several years [5, 7] and are now routinely used in diverse EDA applications. Nevertheless, a number of practical SAT instances remain difficult to solve [9] and continue

Fault diagnosis and logic debugging using Boolean satisfiability

by Alexander Smith, Andreas Veneris, Moayad Fahim Ali, Anastasios Viglas - IEEE TRANS. ON CAD , 2005
"... Recent advances in Boolean satisfiability have made it an attractive engine for solving many digital very-large-scaleintegration design problems. Although useful in many stages of the design cycle, fault diagnosis and logic debugging have not been addressed within a satisfiability-based framework. ..."
Abstract - Cited by 73 (32 self) - Add to MetaCart
Recent advances in Boolean satisfiability have made it an attractive engine for solving many digital very-large-scaleintegration design problems. Although useful in many stages of the design cycle, fault diagnosis and logic debugging have not been addressed within a satisfiability-based framework

Symmetry detection for large boolean functions using circuit representation, simulation and satisfiability

by Jin S. Zhang, Alan Mishchenko, Robert Brayton, Malgorzata Chrzanowska-jeske - in DAC , 2006
"... Classical two-variable symmetries play an important role in many EDA applications, ranging from logic synthesis to formal verification. This paper proposes a complete circuit-based method that makes uses of structural analysis, integrated simulation and Boolean satisfiability for fast and scalable d ..."
Abstract - Cited by 10 (2 self) - Add to MetaCart
Classical two-variable symmetries play an important role in many EDA applications, ranging from logic synthesis to formal verification. This paper proposes a complete circuit-based method that makes uses of structural analysis, integrated simulation and Boolean satisfiability for fast and scalable

Efficient Generation of Test Patterns Using Boolean Satisfiability

by Tracy Larrabee - IEEE Trans. on CAD , 1990
"... A combinational circuit can be tested for the presence of a single stuck-at fault by applying a set of inputs that excite a verifiable output response in that circuit. If the fault is present, the output will be different than it would be if the fault were not present. Given a circuit, the goal of a ..."
Abstract - Cited by 48 (4 self) - Add to MetaCart
of an automatic test pattern generation system is to generate a set of input sets that will detect every possible single stuck-at fault in the circuit. This dissertation describes a new method for generating test patterns: the Boolean satisfiability method. The new method generates test patterns in two steps

Debugging sequential circuits using boolean satisfiability

by Moayad Fahim, Ali Andreas, Veneris Sean, Safarpour Rolf Drechsler, Alexander Smith, Magdy Abadir - In Proceedings of the 2004 IEEE/ACM International conference on Computer-aided design , 2004
"... Logic debugging of today's complex sequential circuits is an important problem. In this paper, a logic debugging method-ology for multiple errors in sequential circuits with no state equivalence is developed. The proposed approach reduces the problem of debugging to an instance of Boolean Satis ..."
Abstract - Cited by 42 (14 self) - Add to MetaCart
Logic debugging of today's complex sequential circuits is an important problem. In this paper, a logic debugging method-ology for multiple errors in sequential circuits with no state equivalence is developed. The proposed approach reduces the problem of debugging to an instance of Boolean

Asynchronous Circuit Synthesis with Boolean Satisfiability

by Jun Gu, Ruchir Puri , 1995
"... Asynchronous circuits are widely used in many real time applications such as digital communication and computer systems. The design of complex asynchronous circuits is a difficult and error-prone task. An adequate synthesis method will significantly simplify the design and reduce errors. In this pap ..."
Abstract - Cited by 21 (1 self) - Add to MetaCart
Asynchronous circuits are widely used in many real time applications such as digital communication and computer systems. The design of complex asynchronous circuits is a difficult and error-prone task. An adequate synthesis method will significantly simplify the design and reduce errors

Shatter: Efficient Symmetry-Breaking for Boolean Satisfiability

by unknown authors
"... Boolean satisfiability (SAT) solvers have experienced dramatic improvements in their performance and scalability over the last several years [5, 7] and are now routinely used in diverse EDA applications. Nevertheless, a number of practical SAT instances remain difficult to solve [9] and continue to ..."
Abstract - Add to MetaCart
Boolean satisfiability (SAT) solvers have experienced dramatic improvements in their performance and scalability over the last several years [5, 7] and are now routinely used in diverse EDA applications. Nevertheless, a number of practical SAT instances remain difficult to solve [9] and continue
Results 1 - 10 of 865