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Formal verification of the ARM6 micro-architecture
, 2002
"... This report describes the formal verification of the arm6 micro-architecture using the hol theorem prover. The correctness of the microprocessor design compares the micro-architecture with an abstract, target instruction set semantics. Data and temporal abstraction maps are used to formally relat ..."
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Cited by 8 (2 self)
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relate the state spaces and to capture the timing behaviour of the processor. The verification is carried out in hol and one-step theorems are used to provide the framework for the proof of correctness. This report also describes the formal specification of the arm6's three stage pipelined micro-architecture.
Verifying ARM6 Multiplication
"... Abstract. The hol-4 proof system has been used to formally verify the correctness of the ARM6 micro-architecture. This paper describes the specification and verification of the multiply instructions. The processor’s implementation is based on the modified Booth’s algorithm. Correctness is defined us ..."
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Cited by 2 (0 self)
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Abstract. The hol-4 proof system has been used to formally verify the correctness of the ARM6 micro-architecture. This paper describes the specification and verification of the multiply instructions. The processor’s implementation is based on the modified Booth’s algorithm. Correctness is defined
GATE – a general architecture for text engineering
- In Proceedings of the 16th Conference on Computational Linguistics (COLING96). http://citeseer.nj.nec.com/43097.html
, 2004
"... The hol-4 proof system has been used to formally verify the correctness of the ARM6 micro-architecture. This paper describes the specification and verification of one instructions class, block data transfers; these are a form of load-store instruction in which a set of up to sixteen registers can be ..."
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Cited by 2 (1 self)
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The hol-4 proof system has been used to formally verify the correctness of the ARM6 micro-architecture. This paper describes the specification and verification of one instructions class, block data transfers; these are a form of load-store instruction in which a set of up to sixteen registers can
By
, 2013
"... I declare that this thesis is my own account of my research and contains as its main content work which has not previously been submitted for a degree at any tertiary education institution. ..."
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I declare that this thesis is my own account of my research and contains as its main content work which has not previously been submitted for a degree at any tertiary education institution.
APractical Lattice-based Digital Signature Schemes
"... Digital signatures are an important primitive for building secure systems and are used in most real world security protocols. However, almost all popular signature schemes are either based on the factoring as-sumption (RSA) or the hardness of the discrete logarithm problem (DSA/ECDSA). In the case o ..."
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Digital signatures are an important primitive for building secure systems and are used in most real world security protocols. However, almost all popular signature schemes are either based on the factoring as-sumption (RSA) or the hardness of the discrete logarithm problem (DSA/ECDSA). In the case of classical cryptanalytic advances or progress on the development of quantum computers the hardness of these closely related problems might be seriously weakened. A potential alternative approach is the construction of sig-nature schemes based on the hardness of certain lattices problems which are assumed to be intractable by quantum computers. Due to significant research advancements in recent years, lattice-based schemes have now become practical and appear to be a very viable alternative to number-theoretic cryptography. In this paper we focus on recent developments and the current state-of-the-art in lattice-based digital signatures and provide a comprehensive survey discussing signature schemes with respect to practicality. Additionally, we discuss future research areas that are essential for the continued development of lattice-based cryptography.
unknown title
"... Abstract We provide a treatise about checking proofs of distributed systems by computer using general purpose proof checkers. In particular, we present two approaches to verifying and checking the verification of the Sequential Line Interface Protocol (SLIP), one using rewriting techniques and one ..."
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for the size. But this is not cOITect, either. USING REWRITE SYSTEMS IN ISABELLE/HOL 6 The RSP-principle then guarantees that the specification and implementation are equal. The bunch of work is in the first step expansion. Given a process with a, the possible first steps of the process. The process Si denotes