Results 21  30
of
981
Overlapfree KaratsubaOfman Polynomial Multiplication Algorithms for Hardware Implementations
"... We describe how a simple way to split input operands allows for fast VLSI implementations of subquadratic GF(2)[x] KaratsubaOfman multipliers. The theoretical XOR gate delay of the resulting multipliers is reduced significantly. For example, it is reduced by about 33 % and 25 % for n = 2t and n = 3 ..."
Abstract

Cited by 13 (1 self)
 Add to MetaCart
We describe how a simple way to split input operands allows for fast VLSI implementations of subquadratic GF(2)[x] KaratsubaOfman multipliers. The theoretical XOR gate delay of the resulting multipliers is reduced significantly. For example, it is reduced by about 33 % and 25 % for n = 2t and n
Multilevel Fast Multipole Algorithm for Solving Combined Field Integral Equation of Electromagnetic Scattering
, 1995
"... The fast multipole method (FMM) has been implemented to speed up the matrixvector multiply when an iterative method is used to solve combined field integral equation (CFIE). FMM reduces the complexity from O(N 2 ) to O(N 1:5 ). With a multilevel fast multipole algorithm (MLFMA), it is further re ..."
Abstract

Cited by 194 (11 self)
 Add to MetaCart
The fast multipole method (FMM) has been implemented to speed up the matrixvector multiply when an iterative method is used to solve combined field integral equation (CFIE). FMM reduces the complexity from O(N 2 ) to O(N 1:5 ). With a multilevel fast multipole algorithm (MLFMA), it is further
A Less Recursive Variant of KaratsubaOfman Algorithm for Multiplying Operands of Size a Power of Two
 Proc. 16th IEEE Symposium on Computer Arithmetic (Arith16 2003
, 2003
"... We propose a new algorithm for fast multiplication of large integers having a precision of 2 k computer words, where k is an integer. The algorithm is derived from the KaratsubaOfman Algorithm and has the same asymptotic complexity. However, the running time of the new algorithm is slightly better, ..."
Abstract

Cited by 5 (0 self)
 Add to MetaCart
We propose a new algorithm for fast multiplication of large integers having a precision of 2 k computer words, where k is an integer. The algorithm is derived from the KaratsubaOfman Algorithm and has the same asymptotic complexity. However, the running time of the new algorithm is slightly better
High Speed Efficient Karatsuba Ofman Pipelined Multiplier for Low Contrast Image Enhancement
"... Abstract: Multiplication is one of the supreme operation in many high performance systems such as microprocessor, FIR filters, Digital Signal Processor, Image Processing etc. Since multiplication dominates the execution time of most operations, there is a huge demand in increasing the speed of the m ..."
Abstract
 Add to MetaCart
of the multipliers, which has been subject of interest over years.. Multiplier based on Vedic Mathematics is one of the fast and low power multiplier. This proposed KaratsubaOfman Pipelined Multiplier (KOPM) is designed mainly to optimize speed of the multiplier which is the major requirement in many applications
Area efficient hardware implementation of elliptic curve cryptography by iteratively applying Karatsuba's method
 IEEE Conference of Design, Automation and Test in Europe. 3:70 – 75
, 2005
"... Abstract ..."
Design of a HighSpeed Matrix Multiplier Based on Balanced WordWidth Decomposition and Karatsuba Multiplication
"... Abstract — This paper presents a flexible 2x2 matrix multiplier architecture. The architecture is based on wordwidth decomposition for flexible but highspeed operation. The elements in the matrices are successively decomposed so that a set of small multipliers and simple adders are used to generat ..."
Abstract
 Add to MetaCart
. The Karatsuba multiplication is proposed in this basic approach. This Karatsuba multiplication is an efficient procedure for multiplying large numbers, which gives high speed performance than the booth multiplier.
AN ITERATIVE SUBSTRUCTURING METHOD WITH LAGRANGE MULTIPLIERS
"... We consider the following Poisson model problem with the homogeneous Dirichlet boundary condition −∆u = f in Ω, u = 0 on ∂Ω, (1) where Ω is a bounded polygonal domain in R2 and f is a given function in L2(Ω). For the sake of simplicity, we assume that Ω is partitioned into two subdomains (Ωi)i=1,2 s ..."
Abstract
 Add to MetaCart
We consider the following Poisson model problem with the homogeneous Dirichlet boundary condition −∆u = f in Ω, u = 0 on ∂Ω, (1) where Ω is a bounded polygonal domain in R2 and f is a given function in L2(Ω). For the sake of simplicity, we assume that Ω is partitioned into two subdomains (Ωi)i=1,2 such that Ω =
Hardware Accelerator for the Tate Pairing in Characteristic Three Based on KaratsubaOfman Multipliers. Cryptology ePrint Archive, Report 2009/122
, 2009
"... Abstract. This paper is devoted to the design of fast parallel accelerators for the cryptographic Tate pairing in characteristic three over supersingular elliptic curves. We propose here a novel hardware implementation of Miller’s loop based on a pipelined KaratsubaOfman multiplier. Thanks to a ..."
Abstract

Cited by 3 (2 self)
 Add to MetaCart
Abstract. This paper is devoted to the design of fast parallel accelerators for the cryptographic Tate pairing in characteristic three over supersingular elliptic curves. We propose here a novel hardware implementation of Miller’s loop based on a pipelined KaratsubaOfman multiplier. Thanks to a
International Journal of Electrical and Computer Engineering 4:9 2009 Efficient Large Numbers KaratsubaOfman Multiplier Designs for Embedded Systems
"... Abstract—Long number multiplications (n ≥ 128bit) are a primitive in most cryptosystems. They can be performed better by using KaratsubaOfman technique. This algorithm is easy to parallelize on workstation network and on distributed memory, and it’s known as the practical method of choice. Multipl ..."
Abstract
 Add to MetaCart
. Multiplying long numbers using KaratsubaOfman algorithm is fast but is highly recursive. In this paper, we propose different designs of implementing KaratsubaOfman multiplier. A mixture of sequential and combinational system design techniques involving pipelining is applied to our proposed designs
An Efficient Polynomial Multiplier in GF(2 m) and its Application to ECC Designs
"... In this paper we discuss approaches that allow to construct efficient polynomial multiplication units. Such multipliers are the most important components of ECC hardware accelerators. The proposed hRAIK multiplication improves energy consumption, the longest path, and required silicon area compared ..."
Abstract
 Add to MetaCart
to state of the art approaches. We use such a core multiplier to construct an efficient sequential polynomial multiplier based on the known iterative Karatsuba method. Finally, we exploit the beneficial properties of the design to build an ECC accelerator. The design for GF(2 233) requires about 1.4 mm 2
Results 21  30
of
981