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113
A Quantitative Analysis of Recon�gurable Coprocessors for Multimedia Applications
"... Recently � computer architectures that combine a recon�g� urable �or retargetable � coprocessor with a general�purpose microprocessor have been proposed. These architectures are designed to exploit large amounts of �ne grain par� allelism in applications. In this paper � we study the per� formance o ..."
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of the recon�gurable coprocessors on multimedia applications. We compare a Field Programmable Gate Ar� ray �FPGA � based recon�gurable coprocessor with the array processor called REMARC �Recon�gurable Multimedia Ar� ray Coprocessor�. REMARC uses a 16�bit simple processor that is much larger than a Con�gurable
REMARC � Recon�gurable Multimedia Array Coprocessor
"... This paper describes a new recon�gurable processor ar� chitecture called REMARC �Recon�gurable Multime� dia Array Coprocessor�. REMARC is a recon�gurable coprocessor that is tightly coupled to a main RISC pro� cessor and consists of a global control unit and 64 pro� grammable logic blocks called nan ..."
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Cited by 1 (0 self)
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This paper describes a new recon�gurable processor ar� chitecture called REMARC �Recon�gurable Multime� dia Array Coprocessor�. REMARC is a recon�gurable coprocessor that is tightly coupled to a main RISC pro� cessor and consists of a global control unit and 64 pro� grammable logic blocks called
and Processors with recon gurable hardwares.
, 1998
"... Trends in semiconductor and VLSI/CAD technology sugguest that having recon gurable logic ..."
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Trends in semiconductor and VLSI/CAD technology sugguest that having recon gurable logic
Programmable Active Memories: Recon gurable Systems Come of Age
- IEEE Transactions on VLSI Systems
, 1996
"... Abstract | Programmable Active Memories (PAM) are a novel form of universal recon gurable hardware co-processor. Based on Field-Programmable Gate Array (FPGA) technology, aPAM is a virtual machine, controlled by a standard microprocessor, which can be dynamically and inde nitely recongured into a la ..."
Abstract
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Cited by 13 (0 self)
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Abstract | Programmable Active Memories (PAM) are a novel form of universal recon gurable hardware co-processor. Based on Field-Programmable Gate Array (FPGA) technology, aPAM is a virtual machine, controlled by a standard microprocessor, which can be dynamically and inde nitely recongured into a
Based on Field�Programmable Gate Array �FPGA � technology�
"... form of universal recon�gurable hardware co�processor. ..."
Optimal algorithms for constrained recon gurable meshes
- J. Par. Distr. Comput
, 1996
"... This paper introduces a constrained recon gurable mesh model which incorporates practical assumptions about propagation delays on large sized buses. Simulations of optimal recon gurable mesh algorithms on the constrainedrecon gurable mesh model are found to be non{optimal. Optimal solutions for the ..."
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Cited by 3 (2 self)
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This paper introduces a constrained recon gurable mesh model which incorporates practical assumptions about propagation delays on large sized buses. Simulations of optimal recon gurable mesh algorithms on the constrainedrecon gurable mesh model are found to be non{optimal. Optimal solutions
A simulator for the recon gurable mesh architecture
, 1997
"... Abstract. In this paper we present a simulator for the recon gurable mesh SIMD architecture. The purpose of the simulator is to assist in the analysis of algorithms and the visualisation of their behaviour. Furthermore, it can be used to demonstrate the potential of recon guration in an educational ..."
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Abstract. In this paper we present a simulator for the recon gurable mesh SIMD architecture. The purpose of the simulator is to assist in the analysis of algorithms and the visualisation of their behaviour. Furthermore, it can be used to demonstrate the potential of recon guration in an educational
Recon gurable Control for the Formation Flying of Multiple Spacecraft
"... Several results on the recon gurable control architecture for the formation ying of multiple spacecraft are presented. In this direction, simple control laws are combined with logic-based switching to propose ahybrid control architecture for leader reassignment, leader-following capturing, and deali ..."
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Several results on the recon gurable control architecture for the formation ying of multiple spacecraft are presented. In this direction, simple control laws are combined with logic-based switching to propose ahybrid control architecture for leader reassignment, leader-following capturing
A Conceptual Design for Recon¯gurable Robots
"... The paper presents a new paradigm and conceptual design for recon¯gurable robots. Unlike conventional recon¯gurable robots, our design doesn't achieve re-con¯gurability by utilizing modular joints. But the robot is equipped with passive joints, i.e. joints with no actuator or sensor, which perm ..."
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The paper presents a new paradigm and conceptual design for recon¯gurable robots. Unlike conventional recon¯gurable robots, our design doesn't achieve re-con¯gurability by utilizing modular joints. But the robot is equipped with passive joints, i.e. joints with no actuator or sensor, which
A Recon gurable Content Addressable Memory
"... Abstract. Content Addressable Memories or CAMs are popular parallel matching circuits. They provide the capability, in hardware, to search a table of data for a matching entry. This functionality is a high performance alternative to popular software-based searching schemes. CAMs are typically found ..."
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in embedded circuitry where fast matching is essential. This paper presentsanovel approach to CAM implementation using FPGAs and run-time recon guration. This approach produces CAM circuits that are smaller, faster and more exible than traditional approaches. 1
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