"... In PAGE 3: ... Load, store and address arithmetic constitute ac- cess related operations that may be performed in overlap with oating point computations. Table3 presents the access related instructions in the instruction stream. We may observe that approximately two-thirds of all instruc- tions in the instruction stream are access related.... ..."

"... In PAGE 5: ... Similarly, faults in instruction op- code bits can transform non-stores to stores, also resulting in SDC. In order to protect data going to memory, the CRAFT:CSB compiler duplicates store instructions in the same way that it duplicates all other instructions (refer to Table2 ), except that store instructions are also tagged with a single-bit version name, indicating whether a store is an original or a duplicate. Also, the compiler schedules stores so that the duplicate stores happen in the same dynamic or- der as the original stores.... In PAGE 5: ... Note that, though this technique du- plicates all stores, no extra memory traffic is created, since only one store of each pair leaves the CSB. Unlike the orig- inal SWIFT code, CRAFT:CSB code no longer needs val- idation codes before store instructions ( Table2 ). This re- duces dependence height, improving performance.... In PAGE 6: ... SWIFT accomplishes this by gen- erating a move instruction after every load. As shown in Table2 , the load address is validated, data is loaded from memory, and the loaded value is copied into a duplicate register. This code sequence opens two windows of vulner- ability.... In PAGE 6: ... 5.3 CRAFT: CSB + LVQ The third and final CRAFT technique duplicates both store and load instructions (refer to Table2 ) and adds both the checking store buffer and the load value queue en- hancements simultaneously to a software-only fault detec- tion system such as SWIFT. 6 A Methodology for Measuring Reliability Mean Time To Failure (MTTF) and AVF are two com- monly used reliability metrics.... ..."

"... In PAGE 5: ... Similarly, faults in instruction op- code bits can transform non-stores to stores, also resulting in SDC. In order to protect data going to memory, the CRAFT:CSB compiler duplicates store instructions in the same way that it duplicates all other instructions (refer to Table2 ), except that store instructions are also tagged with a single-bit version name, indicating whether a store is an original or a duplicate. Also, the compiler schedules stores so that the duplicate stores happen in the same dynamic or- der as the original stores.... In PAGE 5: ... Note that, though this technique du- plicates all stores, no extra memory traffic is created, since only one store of each pair leaves the CSB. Unlike the orig- inal SWIFT code, CRAFT:CSB code no longer needs val- idation codes before store instructions ( Table2 ). This re- duces dependence height, improving performance.... In PAGE 6: ... SWIFT accomplishes this by gen- erating a move instruction after every load. As shown in Table2 , the load address is validated, data is loaded from memory, and the loaded value is copied into a duplicate register. This code sequence opens two windows of vulner- ability.... In PAGE 6: ... 5.3 CRAFT: CSB + LVQ The third and final CRAFT technique duplicates both store and load instructions (refer to Table2 ) and adds both the checking store buffer and the load value queue en- hancements simultaneously to a software-only fault detec- tion system such as SWIFT. 6 A Methodology for Measuring Reliability Mean Time To Failure (MTTF) and AVF are two com- monly used reliability metrics.... ..."

"... In PAGE 9: ...counters themselves, implying they are quite accurate. Table2 shows the results of perfect instruction mix giving the ideal CPI of the MIPS R10000. These results directly validate our model on the MIPS R10000.... ..."