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SLIPSTREAM PROCESSORS
"... Processors execute a program’s full dynamic instruction stream to arrive at its final output, yet there exist shorter instruction streams that produce the same overall effect. This thesis proposes creating a shorter but otherwise equivalent version of the original program by removing ineffectual com ..."
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and redirecting it as needed. Slipstream execution using two processors of a CMP substrate outperforms conventional non-redundant execution using only one of the processors. Likewise, given a sufficiently reduced leading program, slipstream execution using two contexts of an SMT substrate outperforms conventional
A Study of Slipstream Processors
, 2000
"... A slipstream processor reduces the length of a running program by dynamically skipping computation non-essential for correct forward progress. The shortened program runs faster as a result, but it is speculative. So a second, unreduced copy of the program is run concurrently with and slightly behind ..."
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Cited by 45 (1 self)
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A slipstream processor reduces the length of a running program by dynamically skipping computation non-essential for correct forward progress. The shortened program runs faster as a result, but it is speculative. So a second, unreduced copy of the program is run concurrently with and slightly
A Study of Slipstream Processors
- in Proceedings of the 33rd Annual International Symposium on Microarchitecture
, 2000
"... A slipstream processor reduces the length of a running program by dynamically skipping computation non-essential for correct forward progress. The shortened program runs faster as a result, but it is speculative. So a second, unreduced copy of the program is run concurrently with and slightly behind ..."
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A slipstream processor reduces the length of a running program by dynamically skipping computation non-essential for correct forward progress. The shortened program runs faster as a result, but it is speculative. So a second, unreduced copy of the program is run concurrently with and slightly
Slipstream processors: improving both performance and fault tolerance
- In Proceedings of the ninth international conference on Architectural
"... Processors execute the full dynamic instruction stream to arrive at the final output of a program, yet there exist shorter instruction streams that produce the same overall effect. We propose creating a shorter but otherwise equivalent version of the original program by removing ineffectual computat ..."
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Cited by 187 (6 self)
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Processors execute the full dynamic instruction stream to arrive at the final output of a program, yet there exist shorter instruction streams that produce the same overall effect. We propose creating a shorter but otherwise equivalent version of the original program by removing ineffectual
Slipstream Multiprocessors
, 2003
"... The main goal of parallelization is speed up. As the number of processors increases, there is a little or no speedup, since a performance threshold is reached for a fixed problem size. This is because scalability for a parallel program is limited by the communication and synchronization overhead. Sl ..."
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The main goal of parallelization is speed up. As the number of processors increases, there is a little or no speedup, since a performance threshold is reached for a fixed problem size. This is because scalability for a parallel program is limited by the communication and synchronization overhead
Slipstream Memory Hierarchies
, 2002
"... A slipstream processor harnesses an otherwise unused processing element in a chip multiprocessor (CMP) to speed up a single program. It does this by running two redundant copies of the program. Predicted-non-essential computation is speculatively removed from one of the programs, speeding it up. The ..."
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Cited by 12 (1 self)
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A slipstream processor harnesses an otherwise unused processing element in a chip multiprocessor (CMP) to speed up a single program. It does this by running two redundant copies of the program. Predicted-non-essential computation is speculatively removed from one of the programs, speeding it up
Slipstream Execution Mode for CMP-based . . .
, 2003
"... Scalability of applications on distributed shared-memory (DSM) multiprocessors is limited by communication and synchronization overheads. At some point, using more processors to increase parallelism yields diminishing returns or even degrades performance. When increasing concurrency is futile, we pr ..."
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Cited by 1 (0 self)
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propose an additional mode of execution, called slipstream mode, that instead enlists extra processors to assist parallel tasks by reducing perceived overheads. We consider DSM multiprocessors built from dual-processor chip multiprocessor (CMP) nodes (e.g., IBM Power-4 CMP) with shared L2 cache. A
Abstract PARTHASARATHY, SAILASHRI. Improving Transient Fault Tolerance of Slipstream Proces-
"... sors (Under the direction of Dr. Eric Rotenberg) A slipstream processor runs two copies of a program, one slightly ahead of the other, to achieve both higher single-program performance and transient fault tolerance. The leading copy of the program, or the Advanced Stream (A-stream), is accelerated b ..."
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sors (Under the direction of Dr. Eric Rotenberg) A slipstream processor runs two copies of a program, one slightly ahead of the other, to achieve both higher single-program performance and transient fault tolerance. The leading copy of the program, or the Advanced Stream (A-stream), is accelerated
Slipstream execution mode for cmp-based multiprocessors
- Proc. Ninth IEEE Int’l Symp. High-Performance Computer Architecture (HPCA ’03
, 2003
"... Scalability of applications on distributed sharedmemory (DSM) multiprocessors is limited by communication overheads. At some point, using more processors to increase parallelism yields diminishing returns or even degrades performance. When increasing concurrency is futile, we propose an additional m ..."
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Cited by 15 (1 self)
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mode of execution, called slipstream mode, that instead enlists extra processors to assist parallel tasks by reducing perceived overheads. We consider DSM multiprocessors built from dualprocessor chip multiprocessor (CMP) nodes with shared L2 cache. A task is allocated on one processor of each CMP node
Static Determination of Synchronization Method for Slipstream Multiprocessors
, 2004
"... The scalability of a distributed shared memory systems is limited largely by com-munication overhead, most of which can be attributed to memory latency and synchroniza-tion. In systems built with dual-processor single-chip multiprocessors (CMPs) a proposed solution to this scalability limitation is ..."
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is the use of slipstream execution mode for certain applications. Instead of using the second on-chip processor to run a separate slice of the parallel application, slipstream mode utilizes the second processor to run a reduced ver-sion of the same task. The reduced version, known as the advanced stream