Analyzing the Impact of Substrate Noise on Embedded Analog-to-Digital Converters
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Abstract:
Abstract- This paper presents the analysis and measurements of the impact of digital substrate noise on embedded Analog-to-Digital converters. The impact of substrate noise on analog design is explained, followed by a specific entire impact analysis of the impact on a regenerative comparator and an A/D converter. To confirm the analysis the substrate noise has also been measured on a test chip designed in a 0.35 µm heavily–doped-substrate CMOS technology. From the measurements it was deduced that SNR and the effective number of bits are reduced by
Citations
| 122 | Analog Integrated Circuits Design – Johns, Martin |
| 35 | Principles of Data Conversion System Design – Razavi - 1995 |
| 19 | de Plassche, Integrated Analog-to-Digital and Digital-to-Analog Converters – van - 1994 |
| 16 | Design techniques for high-speed, highresolution comparators – Razavi, Wooley - 1916 |
| 7 | Analysis of Accumulated Timing-Jitter in the Time Domain – Awad - 1998 |
| 5 | Methodology and Experimental Verification for Substrate Noise Reduction – Badaroglu, Heijningen, et al. - 2002 |
| 4 | A design experiment for measurement of the spectral content of substrate noise in mixed-signal integrated circuits – Heijningen, Compiet, et al. - 1999 |
| 3 | Voltage-comparator-based measurement of equivalently sampled substrate noise waveforms in mixed-signal integrated circuits – Makie-Fukuda, Anbo, et al. - 1996 |
| 1 | 8-bit 200MS/s Interpolating/Averaging CMOS – Vandenbussche, al |
| 1 | Bipolar 2-GHz 6-bit Flash A/D Conversion LSI – Wakimoto, al - 1988 |
