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  Viable Architectures for High-Performance Computing,” The Computer (2003) [2 citations — 0 self]

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by Sotirios G. Ziavras, Qian Wang, Paraskevi Papathanasiou
IEEE TRANSACTIONS ON PARALLEL AND DISTRIBUTED SYSTEMS
http://www3.oup.co.uk/computer_journal/hdb/Volume_46/Issue_01/pdf/460036.pdf
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Abstract:

Citations

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36 High performance interprocessor communication through optical wavelength division multiple access channels – Dowd - 1991
28 RH: a versatile family of reduced hypercube interconnection networks – Ziavras - 1994
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10 Optimal communication primitives on the generalized hypercube network – Fragopoulou, Akl, et al. - 1996
6 Investigation of Various Mesh Architectures with Broadcast Buses for High Performance Computing – Ziavras - 1999
5 A gang-scheduling system for ASCI Blue-Pacific – Moreira, Franke, et al. - 1999
5 Parallel DSP Algorithms on TurboNet: An Experimental Hybrid Message-Passing/Shared-Memory Architecture – Li, Ziavras, et al. - 1996
5 Scalable multifolded hypercubes for versatile parallel computers – Ziavras - 1995
5 Broadcasting multiple messages in the multiport model – Bar-Noy, Ho - 1999
4 On the problem of expanding hypercube-based systems – Ziavras - 1992
4 Evaluating the communications capabilities of the generalized hypercube interconnection network. Concurrency: Pract – Ziavras, Krishnamurthy - 1999
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3 Communication structures for large networks of multicomputers – Wittie - 1981
3 A scalable/feasible parallel computer implementing electronic and optical interconnections for 156 teraflops minimum performance – Ziavras, Grebel, et al. - 1996
2 Generalized reduced hypercube interconnection networks for massively parallel computers – Ziavras - 1995
2 The Stanford FLASH multiprocessor – Lenoski - 1992
2 Complexity of intensive communications on balanced generalized hypercubes – Antonio, Lin, et al. - 1993
2 Powerful and feasible processor interconnections with an evaluation of their communications capabilities – Wang, Ziavras - 1999