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by Sotirios G. Ziavras A, Haim Grebel A, Anthony T. Chronopoulos B, Florent Marcelli A
http://web.njit.edu/~ziavras/FGCS.pdf
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Abstract:

A new-generation parallel computer and its performance evaluation �

Citations

220 The torus routing chip – Dally, Seitz - 1986
125 Generalised hypercube and hyperbus structures for a computer network – Bhuyan, Agarwal - 1984
75 Software Versus Hardware Shared-Memory Implementation: a Case Study – Cox, Dwarkadas, et al. - 1994
49 The indirect binary n-Cube microprocessor array – Pease - 1977
45 Network and processor architecture for message-driven computer – Dally - 1990
41 Concurrent vlsi architectures – Seitz - 1984
28 RH: a versatile family of reduced hypercube interconnection networks – Ziavras - 1994
27 Reducing Communication Latency with Path Multiplexing in Optically Interconnected Multiprocessor Systems – Qiao, Melhem - 1997
26 Hyper-meshes: Optical interconnection networks for parallel processing – Szymanski - 1995
10 Optimal communication primitives on the generalized hypercube network – Fragopoulou, Akl, et al. - 1996
6 Investigation of Various Mesh Architectures with Broadcast Buses for High Performance Computing – Ziavras - 1999
5 Parallel DSP Algorithms on TurboNet: An Experimental Hybrid Message-Passing/Shared-Memory Architecture – Li, Ziavras, et al. - 1996
5 Scalable multifolded hypercubes for versatile parallel computers – Ziavras - 1995
5 A Low-Complexity Parallel System for Gracious, Scalable Performance. Case Study for Near PetaFLOPS Computing – Ziavras - 1996
4 On the problem of expanding hypercube-based systems – Ziavras - 1992
4 Data broadcasting and reduction, prefix computation, and sorting on reduced hypercube parallel computers – Ziavras, Mukherjee - 1996
3 Communication structures for large networks of multicomputers – Wittie - 1981
3 A scalable/feasible parallel computer implementing electronic and optical interconnections for 156 teraflops minimum performance – Ziavras, Grebel, et al. - 1996
2 The Stanford FLASH multiprocessor – Lenoski - 1992
2 A 20 GHz 8 bit multiplexer IC implemented with 0.5�m WNx/W-Gate GaAs MESFET’s – Seshita, Ikeda, et al. - 1994
2 Generalized reduced hypercube interconnection networks for massively parallel computers – Ziavras - 1995
1 Parallel computer reconfigurablility through optical interconnects – Aly, Dowd - 1992
1 Defense Modeling and Simulation Office – unknown authors - 1994
1 et al., Parallel optical interconnects: implementation of optoelectronics in multiprocessors architecture – Frietman - 1990
1 Free-space wavelength division multiplexing optical interconnections for massively parallel processing systems – Kajita, Kasahara, et al. - 1996
1 Teraflops design in eight easy steps – Patterson - 1991
1 Optical Fiber Communication, 2nd Edition – Senior - 1992
1 Si-Analog IC’s for 20 Gb/s optical receiver – Soda, Tezuka, et al. - 1994
1 Design of transverse holographic optical interconnect – Tsay, Grebel - 1994
1 Optical Electronics, 4th Edition – Yariv - 1991