The power consumption of modern high-performance processors is becoming a major concern because it leads to increased heat dissipation and decreased reliability. While many techniques have been proposed to reduce power consumption for uni-processors, there has been considerably less work on multi-processor systems. In this paper, we focus on poweraware scheduling for multi-processor real-time systems. Based on the idea of slack sharing among processors, we propose two novel scheduling algorithms for task sets with and without precedence constraints. These scheduling techniques reclaim the time unused by a task to reduce the execution speed of future tasks, and thus reduce the total energy consumption of the system. Simulation results indicate that our algorithms achieve up to 60 % energy savings on multi-processor systems with variable voltage processors. 1
|
308
|
Low-power CMOS digital design
– Chandrakasan, Sheng, et al.
- 1992
|
|
242
|
Real-time dynamic voltage scaling for low-power embedded operating systems
– Pillai, Shin
- 2001
|
|
228
|
A scheduling model for reduced CPU energy
– Yao, Demers, et al.
- 1995
|
|
201
|
Voltage Scheduling Problem for dynamically variable voltage processors
– Ishihara, Yasuura
- 1998
|
|
140
|
Proportionate progress: A notion of fairness in resource allocation
– Baruah, Cohen, et al.
- 1996
|
|
110
|
A dynamic voltage scaled microprocessor system
– Burd, Pering, et al.
- 2000
|
|
99
|
Multiprocessor On-Line Scheduling of Hard Real-Time Tasks
– Dertouzos, Mok
- 1989
|
|
98
|
Dynamic and aggressive scheduling techniques for poweraware real-time systems
– Aydin, Melhem, et al.
- 2001
|
|
73
|
Energy efficient cmos microprocessor design
– Burd, Brodersen
- 1995
|
|
72
|
Processor design for portable systems
– Burd, Brodersen
- 1996
|
|
65
|
Data driven signal processing: An approach for energy efficient computing
– Chandrakasan, Gutnik, et al.
- 1996
|
|
62
|
Compilerassisted dynamic power-aware scheduling for real-time applications
– Mossé, Aydin, et al.
- 2000
|
|
50
|
Embedded program timing analysis based on path clustering and architecture classification
– Ernst, Ye
- 1997
|
|
45
|
Compiler-Directed Dynamic Frequency and Voltage Scaling
– Hsu, Kremer, et al.
- 2000
|
|
42
|
A High Efficiency VariableVoltage CMOS Dynamic DC-DC Switching Regulator
– Namgoang, Yu, et al.
- 1997
|
|
33
|
Parallel MPEG-1 Video Encoding
– Gong, Rowe
- 1994
|
|
27
|
Voltage Clock Scaling Adaptive Scheduling Techniques for Low Power
– Krishna, Lee
- 2000
|
|
20
|
Toward the placement of power management points in real time applications
– AbouGhazaleh, Mossé, et al.
- 2001
|
|
19
|
Aided and automatic target recognition based upon sensory inputs from image forming systems
– Ratches, Walters, et al.
- 1997
|
|
10
|
Parallel algorithms and Architectures
– Cosnard, Trystram
- 211
|
|
8
|
Energy-aware runtime scheduling for embedded-multiprocessor socs
– Yang, Wong, et al.
|
|
7
|
Fault Tolerant Real-Time Global Scheduling on Multiprocessors
– Liberato, Lauzac, et al.
- 1999
|
|
6
|
System-Level Design Methods for Low-Energy Architectures Containing Variable Voltage Processors
– Gruian
- 2000
|
|
3
|
An Experimental Evaluation of List Scheduling
– COOPER, SCHIELKE, et al.
- 1998
|
|
2
|
Toward the Placement of
– unknown authors
- 2001
|
|
1
|
S.Sheng and R.Brodersen. Low-power CMOS Digital Design
– Chandrakasan
- 1992
|
|
1
|
System-Level Design Methods for Low-Energy Architectures Containing Variable Voltage Processors. The PowerAware Computing
– Flavius
- 2000
|
|
1
|
M.Potkonjak and M.Srivastava. Synthesis Techniques for Low-Power Hard Real-Time Tasks on Variable Voltage Processors
– Hong
- 1998
|
|
1
|
P.J.Schielke and D.Subramanian. An Experimental Evaluation of List Scheduling
– Cooper
- 1998
|
|
1
|
243--259. Power Aware Computing
– Shriver, Gokhale, et al.
- 2002
|