A PCI Bus Based Correlation Matrix Memory and Its Application to k-NN Classification (1999) [2 citations — 1 self]
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by Ping Zhou, Jim Austin
MicroNeuro'99, 7 th Int. Conf. On Microelectronics for Neural, Fuzzy & Bio-inspired Systems
http://www-users.cs.york.ac.uk/~lees/MNEURO_99/zhoup_micron99.ps
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Abstract:
This paper describes a PCI bus based implementation of a binary correlation matrix memory (CMM) neural network and its application and performance for use as a k-NN based pattern classification system. The system expands on earlier VME based system incorporating FPGA based implementation through greater integration and lower cost. Experimental results for several benchmarks show that, compared with a simple k-NN method, the CMM hardware gave speed up of 8-98.8 times during recall process with a classification performance which is 99%-100 % that of a conventional kNN implementation. 1.
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