Jingren Zhou, John Cieslewicz, Kenneth A. Ross, Mihir Shah  Home/Search
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Abstract: Simultaneous multithreading (SMT) allows multiple threads to supply instructions to the instruction pipeline of a superscalar processor. (Update)
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BibTeX entry: (Update)
@misc{ zhou-improving,
author = "Jingren Zhou and John Cieslewicz and Kenneth A. Ross and Mihir Shah",
title = "Improving Database Performance on Simultaneous Multithreading Processors",
url = "citeseer.ist.psu.edu/zhou05improving.html" }
Citations (may not include all citations):251 Simultaneous multithreading: Maximizing on-chip parallelism - Tullsen, Eggers et al. - 1995
52 DBMSs on a modern processor: Where does time go - Ailamaki, DeWitt et al. - 1999
48 Speculative precomputation: Long-range prefetching of delinq.. - Collins, Wang et al. - 2001
47 An analysis of database workload performance on simultaneous.. - Lo, Barroso et al. - 1998
39 Simultaneous subordinate microthreading (context) - Chappell, Stark et al. - 1999
34 Database architecture optimized for the new bottleneck: Memo.. - Boncz, Manegold et al. - 1999
28 Slipstream processors: improving both performance and fault .. - Sundaramoorthy, Purser et al. - 2000
27 trees cache conscious in main memory (context) - Rao, Ross - 2000
26 Cache conscious indexing for decision-support in main memory - Rao, Ross - 1999
19 Hyper-threading technology architecture and microarchitectur.. (context) - Marr, Binns et al. - 2002
17 Improving index performance through prefetching - Chen, Gibbons et al. - 2001
14 Runahead execution: An alternative to very large instruction.. - Mutlu, Stark et al. - 2003
13 Optimizing multidimensional index trees for main memory acce.. (context) - Kim, Cha et al. - 2001
10 trees: Optimizing both cache and disk performance (context) - Chen, Gibbons et al. - 2002
7 Improving hash join performance through prefetching - Chen, Ailamaki et al. - 2004
6 Memory latency-tolerance approaches for itanium processors: .. (context) - Wang, Wang et al. - 2002
5 Main-memory index structures with fixed-size partial keys - Bohannon, McIlroy et al. - 2001
3 Physical experimentation with prefetching helper threads on .. (context) - Kim, Liao et al. - 2004
2 The microarchitecture of the intel pentium 4 processor on 90.. (context) - Boggs, Baktha et al. - 2004
2 ering database operations for enhanced instruction cache per.. (context) - Zhou, Ross - 2004
2 STEPS towards cacheresident transaction processing (context) - Harizopoulos, Ailamaki - 2004
1 Programming with Multithreaded Software for Intel IA-32 Proc.. (context) - Binstock, Gerber - 2004
1 Speculative precompuation: Exploring the use of multithreadi.. (context) - Wang, Wang et al. - 2002
1 ering accesses to memoryresident index structures (context) - Zhou, Ross - 2003
http://developer.intel.com
http://homepages.cwi.nl/
http://www.sun.com/processors/index.html
http://www.ibm.com/technology/power/
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