Automatic Abstraction for Verication of Timed Circuits and Systems
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by Hao Zheng, Eric Mercer, Chris Myers
http://www.async.ece.utah.edu/publications/CAV01.ps.gz
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Abstract:
Abstract. This paper presents a new approach for verication of asynchronous circuits by using automatic abstraction. It attacks the state explosion problem by avoiding the generation of a at state space for the whole design. Instead, it breaks the design into blocks and conducts veri cation on each of them. Using this approach, the speed of verication improves dramatically. 1
Citations
| 41 | Timing analysis in COSPAN – Alur, Kurshan - 1996 |
