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  Vista: a system for interactive code improvement (2002) [14 citations — 5 self]

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by Wankang Zhao, Baosheng Cai, David Whalley, Mark W. Bailey, Robert Van Engelen, Xin Yuan, Jason D. Hiser, Jack W. Davidson, Kyle Gallivan, Douglas, L. Jones
in "Proceedings of the joint conference on Languages, compilers
http://www.cs.fsu.edu/~xyuan/paper/02lctes.pdf
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Abstract:

Software designers face many challenges when developing applications for embedded systems. A major challenge is meeting the conflicting constraints of speed, code density, and power consumption. Traditional optimizing compiler technology is usually of little help in addressing this challenge. To meet speed, power, and size constraints, application developers typically resort to hand-coded assembly language. The results are software systems that are not portable, less robust, and more costly to develop and maintain. This paper describes a new code improvement paradigm implemented in a system called vista that can help achieve the cost/ performance trade-offs that embedded applications demand. Unlike traditional compilation systems where the smallest unit of compilation is typically a function and the programmer has no control over the code improvement process other than what types of

Citations

134 A portable global optimizer and linker – Benitez, Davidson - 1988
95 Code Generation for Embedded Processors – Marwedel, Goossens, et al. - 1995
87 Parafrase-2: An environment for parallelizing, partitioning, synchronizing, and scheduling programs on multiprocessors – Polychronopoulos, Girkar, et al. - 1989
65 Optimizing for reduced code space using genetic algorithms – Cooper, Schielke, et al. - 1999
59 Combining Analyses, Combining Optimizations – Click - 1995
55 Retargetable Code Generation for Digital Signal Processors – Leupers - 1997
54 Combined selection of tile sizes and unroll factors using iterative compilation – Kisuki, Knijnenburg, et al. - 2000
48 Adaptive optimizing compilers for the 21 st century – Cooper, Subramanian, et al. - 2001
45 Code Compression for Embedded Systems – Lekatsas, Wolf - 1998
40 The advantages of machinedependent global optimization – Benitez, Davidson - 1994
39 A design environment for addressing architecture and compiler interactions – Davidson, Whalley - 1991
38 CCG: A prototype coagulating code generator – Morris - 1991
29 Start/Pat: A Parallel-Programming Toolkit – Appelbe, Smith, et al. - 1989
15 Code Optimization Libraries for Retargetable Compilation for Embedded Digital Signal Processors – Sudarsanam - 1998
14 Design and implementation of the uw illustrated compiler – Andrews, Henry, et al.
14 Isolation and Analysis of Optimization Errors – Boyd, Whalley - 1993
13 A visualization system for parallelizing programs – Dow, Chang, et al. - 1992
11 Graphical visualization of compiler optimizations – Boyd, Whalley - 1995
9 Retargetable Register Allocation – Benitez - 1994
9 Automatic validation of code-improving transformations – Engelen, Whalley, et al. - 2000
8 Parallel structuring of real-time simulation programs – Browne, Sridharan, et al. - 1990
6 LoRA: a package for loop optimal register allocation – Eisenbeis, Lelait - 1998
5 ILP-based Approximations for Retargetable Code Optimization – Kastner - 2001
5 SUIF Explorer: An Interactive and Interprocedural Parallelizer – Bosch, Ghuloum, et al. - 1999
3 Souza de Araujo. Code Generation Algorithms for Digital Signal Processors – Costa - 1997
3 Traversal-based visualization of data structures – Korn, Appel - 1998
1 Design and implemcntation of thc UW illustratcd compilcr – Andrews, Henry, et al. - 1988
1 Graphical visuahzation of compilcr optimizations – Boyd, Whallcy - 1995
1 Parallcl structuring of rcal-timc simulation programs – Eventoff - 1990
1 Devika S ubramanian, and Linda Torczon. Adaptive optimizing compilers for the 21 st century – Cooper
1 A dcsign cnviromncnt for addressing architecture and compiler interactions. Micttprocessors and Microsystems, pagcs 459,72, Novcmbcr – Davidson, Whallcy - 1991
1 Souza dc Araujo. Code Generation Algorithms 9%r Digital Signal Processors – Costa - 1997
1 A visualization systcm for parallelizing programs – Dow, Chang, et al. - 1992
1 LoRA: a packagc for loop optimal register allocation – Eiscnbcis, Lclait - 1998
1 lip-based approximations for retargetable code optimization – Kiistner - 2001
1 Code compression for embedded systerns – Lekatsas - 2000
1 Retargetable Code Generation fir Digital Signal Processors – Leupers - 1997
1 Code Generationfir Etnbe&ledProcessors – Marwedel, Goossens - 1995
1 Code Optimization Libraries.fir Retargetable Compilation fir Embedded Digital Signal Processors – Sudarsanam - 1998
1 Automatic validation of codc-improving transformations – Engelen, Whalley, et al. - 2000