| Alternate document: Details Hardware for Speculative Parallelization in High-End Multiprocessors (99) Ye Zhang, Lawrence Rauchwerger, Josep Torrellas |
| Alternate document: Details Hardware for Speculative Reduction Parallelization and Optimization in DSM Multiprocessors (99) Ye Zhang, Lawrence Rauchwerger, Josep |
(Enter summary)
Abstract: this paper is
to extend our previous hardware scheme to eectively handle
codes (loops) with a modest number of cross-iteration dependences.
With the proposed extensions, when a dependence
violation is encountered, the state is quickly repaired on the
y and parallel execution is resumed from that point on. Simulation
results suggest that this form of DSM speculative parallelization
is promising: a 16-processor parallel execution of
4 important loops runs 4.2 and 31 times faster than two... (Update)
Context of citations to this paper: More
...finergranularity threads. Research by the CMU STAMPede team [17] 18] 19] and at the University of Illinois at UrbanaChampaign [4] 5][20] explores different design points with less closely coupled processors, more similar to our TLS CMP. Relevant research done by Rauchwerger,...
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BibTeX entry: (Update)
Y. Zhang, L. Rauchwerger, and J. Torrellas. Hardware for Speculative Parallelization of Partially-Parallel Loops in DSM Multiprocessors. In Proceedings of the 5th International Symposium on High-Performance Computer Architecture, January 1999. http://citeseer.ist.psu.edu/zhang99hardware.html More
@inproceedings{ zhang99hardware,
author = "Y. Zhang and Lawrence Rauchwerger and Josep Torrellas",
title = "Hardware for Speculative Parallelization of Partially-Parallel Loops in {DSM} Multiprocessors",
booktitle = "{HPCA}",
pages = "135-",
year = "1999",
url = "citeseer.ist.psu.edu/zhang99hardware.html" }
Citations (may not include all citations):
159
The LRPD Test: Speculative Run-Time Parallelization of Loops..
- Rauchwerger, Padua - 1995 DBLP
74
Speculative Versioning Cache
- Gopal, Vijaykumar et al. - 1998 ACM DBLP
72
Data Speculation Support for a Chip Multiprocessor (context) - Hammond, Willey et al. - 1998 ACM DBLP
50
Runtime Compilation Methods for Multicomputers (context) - Wu, Saltz et al. - 1991 DBLP
44
Hardware for Speculative Run-Time Parallelization in Distrib..
- Zhang, Rauchwerger et al. - 1998
26
Hardware and Software Support for Speculative Execution of S..
- Krishnan, Torrellas - 1998
13
The Potential for Using Thread-Level Data Speculation to Fac.. (context) - Ste, Mowry - 1998 ACM DBLP
4
DSM Hardware for Speculative Parallelization (context) - Zhang - 1999
The graph only includes citing articles where the year of publication is known.
Documents on the same site (http://www.cs.tamu.edu/faculty/rwerger/pubs/): More
Run-Time Methods for Parallelizing Partially Parallel Loops - Rauchwerger, Amato, Padua (1995)
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A Unified Approach to Speculative Parallelization of.. - Zhang, Rauchwerger.. (1998)
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The Privatizing DOALL Test: A Run-Time Technique for DOALL.. - Rauchwerger, Padua (1994)
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