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Abstract:

State diagram based approach has been proposed as an effective way to model resource constraints in traditional instruction scheduling and software pipelining methods. However, the constructed state diagram for software pipelining method (i) is very large and (ii) contains significant amount of replicated, and hence redundant, information on legal latency sequences. As a result, the construction of state diagrams can take very large computation time. For example, in modeling the resource constraints of the DEC Alpha 21064 processor, it took more than 24 hours on a 250MHz high-performance workstation to construct, say, 100,000 distinct latency sequences. In another experiment, out of the 224,400 latency sequences generated, only 30 were distinct. These make state diagram based approach impractical in real compiler implementation. In this paper, we propose two methods for the efficient construction of state diagrams. In the first method, we relate the construction of state diagram to a well-known problem in graph theory, namely the enumeration of maximal independent sets of a graph. This facilitates the use of an existing algorithm as a direct method for constructing distinct

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