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by Juntan Zhang, Yige Wang, Marc Fossorier, Jonathan S. Yedidia, Juntan Zhang, Yige Wang, Marc Fossorier, Jonathan S. Yedidia
http://www.merl.com/reports/docs/TR2005-090.pdf
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Abstract:
Replica shuffled versions of iterative decoders of low-density parity-check codes and turbo codes are presented in this paper. The proposed schemes can converge faster than standard and plain shuffled approaches. Two methods, density evolution and EXIT charts, are used to analyze the performance of the proposed algorithms. Both theoretical analysis and simulations show that the new schedules offer good trade-offs with respect to performance, complexity, latency, and connectivity. This work may not be copied or reproduced in whole or in part for any commercial purpose. Permission to copy in whole or in part without payment of fee is granted for nonprofit educational and research purposes provided that all such whole or partial copies include the following: a notice that such copying is by permission of Mitsubishi Electric Research Laboratories, Inc.; an acknowledgment of the authors and individual contributions to the work; and all applicable portions of the copyright notice. Copying, reproduction, or republishing for any other purpose shall require a license with payment
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