Download:
|
by Youtao Zhang, Rajiv Gupta
http://www.cs.arizona.edu/people/gupta/research/Publications/Comp/compress.ps
Add To MetaCart
Abstract:
Abstract. We introduce a class of transformations which modify the representation of dynamic data structures used in programs with the objective of compressing their sizes. We have developed the commonpre x and narrow-data transformations that respectively compress a 32 bit address pointer and a 32 bit integer eld into 15 bit entities. A pair of elds which have been compressed by the above compression transformations are packed together into a single 32 bit word. The above transformations are designed to apply to data structures that are partially compressible, that is, they compress portions of data structures to which transformations apply and provide a mechanism to handle the data that is not compressible. The accesses to compressed data are ef-ciently implemented by designing data compression extensions (DCX) to the processor's instruction set. We have observed average reductions in heap allocated storage of 25 % and average reductions in execution time and power consumption of 30%. If DCX support is not provided the reductions in execution times fall from 30 % to 12.5%. 1
Citations
|
1253
|
The Simplescalar toolset, version 2.0
– Burger, Austin
- 1997
|
|
192
|
MMX technology extension to the Intel architecture
– Peleg, Weiser
- 1996
|
|
146
|
Cache-conscious structure layout
– Chilimbi, Hill, et al.
- 1999
|
|
117
|
Cache-conscious data placement
– Calder, Krintz, et al.
- 1998
|
|
103
|
Dynamically Exploiting Narrow Width Operands to Improve Processor Power and Performance
– Brooks, Martonosi
- 1999
|
|
62
|
Bitwidth analysis with application to silicon compilation
– Stephenson, Babb, et al.
- 2000
|
|
53
|
Exploiting superword level parallelism with multimedia instruction sets
– Larsen, Amarasinghe
- 2000
|
|
42
|
Frequent Value Locality and Value-Centric Data Cache Design
– Zhang, Yang, et al.
- 2000
|
|
42
|
Improving cache behavior of dynamically allocated data structures
– Truong, Bodin, et al.
- 1998
|
|
32
|
Memory Access Coalescing: A Technique for Eliminating Redundant Memory Accesses
– Davidson, Jinturkar
- 1994
|
|
27
|
Wattch: A Framework for Architecture-Level Power Analysis and Optimizations
– Brooks, Tiwari, et al.
- 2000
|
|
20
|
Efficient and flexible value sampling
– Burrows, Erlingson, et al.
- 2000
|
|
7
|
AltiVec(tm): Bringing Vector Technology to the PowerPC(tm) Processor Family
– Tyler, Lent, et al.
- 1999
|
|
2
|
Olden: Parallelizing Progrms with Dynamic Data Structures on Distributed-Memory Machines
– Carlisle
- 1996
|
|
1
|
Frequent Value Compression in Data Caches," The 33nd
– Yang, Zhang, et al.
- 2000
|
