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Abstract: DRAM row-buffer conflicts occur when a sequence of requests on different rows goes to the same memory bank, causing much higher memory access latency than requests to the same row or to different banks. In this paper, we analyze the sources of row-buffer conflicts in the context of superscalar processors, and propose a permutation-based page interleaving scheme to reduce row-buffer conflicts and to exploit data access locality in the row-buffer. Compared with several existing schemes, we show... (Update)
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BibTeX entry: (Update)
Z. Zhang, Z. Zhu, and X. Zhang. A permutation-based page interleaving scheme to reduce row-bu#er conflicts and exploit data locality. In Proceedings of the 33rd Annual IEEE/ACM International Symposium on Microarchitecture (MICRO-33), pages 32--41, Dec. 2000. http://citeseer.ist.psu.edu/zhang00permutationbased.html More
@inproceedings{ zhang00permutationbased,
author = "Zhao Zhang and Zhichun Zhu and Xiaodong Zhang",
title = "A permutation-based page interleaving scheme to reduce row-buffer conflicts and exploit data locality",
booktitle = "International Symposium on Microarchitecture",
pages = "32-41",
year = "2000",
url = "citeseer.ist.psu.edu/zhang00permutationbased.html" }
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