Low-swing on-chip signaling techniques: Effectiveness and robustness (2000) [26 citations — 2 self]

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by Hui Zhang, Varghese George, Student Member, Student Member, Jan M. Rabaey

IEEE Transactions on VLSI Systems

http://www.stanford.edu/class/ee371/handouts/low_swing.pdf

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@ARTICLE{Zhang00low-swingon-chip,
    author = {Hui Zhang and Varghese George and Student Member and Student Member and Jan M. Rabaey},
    title = {Low-swing on-chip signaling techniques: Effectiveness and robustness},
    journal = {IEEE Transactions on VLSI Systems},
    year = {2000},
    volume = {8},
    pages = {264--272}
}

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Abstract:

Abstract—This paper reviews a number of low-swing on-chip interconnect schemes and presents a thorough analysis of their effectiveness and limitations, especially on energy efficiency and signal integrity. In addition, several new interface circuits presenting even more energy savings and better reliability are proposed. Some of these circuits not only reduce the interconnect swing, but also use very low supply voltages so as to obtain quadratic energy savings. The performance of each of the presented circuits is thoroughly examined using simulation on a benchmark interconnect circuit. Significant energy savings up to a factor of six have been observed. Index Terms—Digital CMOS, low-power design, low-voltage, performance tradeoffs, reliability, special low-power 99.

Citations

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