MetaCartSign in to MyCiteSeer

Include Citations | Advanced Search | Help

Include Citations | Advanced Search | Help

  Frequent value locality and value-centric data cache design (2000) [42 citations — 13 self]

Download:
Download as a PDF | Download as a PS
by Youtao Zhang, Jun Yang, Rajiv Gupta
http://www.cs.arizona.edu/~gupta/research/Publications/Comp/asplos00.ps
Add To MetaCart

Abstract:

By studying the behavior of programs in the SPECint95 suite we observed that six out of eight programs exhibit a new kind of value locality, the frequent value locality, according to which a few values appear very frequently in memory locations and are therefore involved in a large fraction of memory accesses. In these six programs ten distinct values occupy over 50 % of all memory locations and on an average account for nearly 50 % of all memory accesses during program execution. This observation holds for smaller blocks of consecutive memory locations and the set of frequent values remains quite stable over the execution of the program. In the six benchmarks with frequent value locality, on an average 50 % of all cache misses occur during the reading or writing of the ten most frequently accessed values. We propose a new data cache structure, the frequent value cache (FVC), which employs a value-centric approach to caching data locations for exploiting the frequent value locality phenomenon. FVC is a small direct-mapped cache which is dedicated to holding only frequently occurring values. The value-centric nature of FVC enables us to store data in a compressed form where the compression is achieved by encoding the frequent values using a few bits. Moreover this simple compression scheme preserves the random access to data values in a cache line. Our experiments demonstrate that by augmenting a direct mapped cache (DMC) with a direct mapped FVC of size no more than 3 Kbytes we can obtain reductions in miss rates ranging from 1 % to 68%. In fact we observed that higher reductions in miss rates can be achieved by augmenting a DMC with a small FVC as opposed to doubling the size of DMC for the 124.m88ksim and 134.perl benchmarks.

Citations

680 Improving Direct-Mapped Cache Performance by the Addition of a Small Fully-Associative Cache and – Jouppi - 1990
314 Value Locality and Load Value Prediction – Lipasti, Wilkerson, et al. - 1996
218 An enhanced access and cycle time model for on-chip caches – Wilton, Jouppi - 1994
103 Dynamically Exploiting Narrow Width Operands to Improve Processor Power and Performance – Brooks, Martonosi - 1999
78 Improving Code Density Using Compression Techniques – Lefurgy, Bird, et al. - 1997
71 Reconfigurable caches and their application to media processing – Ranganathan, Adve, et al. - 2000
63 Compiler techniques for code compaction – Debray, Evans, et al. - 2000
63 Can Program Profiling Support Value Prediction – Gabbay, Mendelson - 1997
62 Bitwidth analysis with application to silicon compilation – Stephenson, Babb, et al. - 2000
30 Frequent value compression in data caches – Yang, Zhang, et al. - 2000
22 Procedure based program compression – Kirovski, Kin, et al. - 1997