Data-reuse exploration for low-power realization of multimedia applications on embedded cores (1999) [7 citations — 4 self]
Download:
by Nikos D. Zervas, Kostas Masselos, C. E. Goutis
Proc. Of 9 th Int. Workshop on Power and Timing Modeling, Optimization and Simulation (PATMOS’99
http://www.vlsi.ee.upatras.gr/Users/Graduate/zervas/PUBS/patmos99.pdf
Add To MetaCart
Abstract:
Exploitation of data re-use in combination with the use of custom memory hierarchy that exploits the temporal locality of data accesses may introduce significant power savings especially for data-intensive applications. In this paper the effect of the datareuse decisions on the power dissipation but also on area and performance of multimedia applications realized on embedded cores is explored. Experimental results prove that power savings of about 35 % can be achieved through the exploitation of data re-use without introducing performance penalties in comparison to reference designs. 1
Citations
| 94 | An area model for on-chip memories and its applications – Mulder, Quach, et al. - 1991 |
| 55 | Image and video compression standards – Bhaskaran, Konstantinides - 1997 |
| 50 | Formalized methodology for data reuse exploration in hierarchical memory mappings – DIGUET, WUYTACK, et al. - 1997 |
| 33 | Portable video-on-demand in wireless communications – Meng - 1994 |
| 16 | Low Power Architectural Design Methodologies – Landman - 1994 |
| 15 | System-level power optimization of video codecs on embedded cores: a systematic approach – Nachtergaele, Moolenaar, et al. - 1998 |
| 11 | Wuytack et al., Custom Memory Management Methodology – Catthoor, S - 1998 |
| 11 | software development toolkit – ARM |
| 6 | Code Transformations for Embedded Multimedia Applications: Impact on Power and Performance – Zervas, Masselos, et al. - 1998 |
| 3 | Low-Power VLIW Processors: A HighLevel Evaluation – Puiatti, Llosa, et al. - 1998 |
