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A Microserver View of HTMT (2001)  (Make Corrections)  (1 citation)
Lilia Yerosheva, Shannon Kuntz, Jay Brockman, Peter Kogge



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Abstract: HTMT is an ambitious new architecture combining cutting edge technologies to reach petaflop performance sooner than current technology trends allow. It is a massively parallel architecture with multi-threaded hardware and a multi-level memory hierarchy. Microservers provide a new perspective for viewing this memory hierarchy whereby memory is actively involved in process execution. This paper discusses the microserver memory semantics and initial HTMT execution models to analyze applications at ... (Update)

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...model to simulate concurrency in HTMT and as a modelling tool to build a software prototype model in Java. Several papers [72] 106] 107][108][109] were prepared and published as a part of this effort. 4 1.6 Related work There are many execution models that have been proposed...

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High-Level Prototyping for the HTMT Petaflop Machine - Yerosheva (2001)   (Correct)

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BibTeX entry:   (Update)

Lilia Yerosheva, Shannon Kuntz, Peter M. Kogge, J. Brockman, "Microserver View of HTMT," will appear in Proc. for IPDPS http://citeseer.ist.psu.edu/yerosheva01microserver.html   More

@inproceedings{ yeroshevamicroserver,
    author = "Lilia V. Yerosheva and Shannon K. Kuntz and Peter K. Kogge and Jay B. Brockman",
    title = "A Microserver View of {HTMT}",
    pages = "3--3",
    url = "citeseer.ist.psu.edu/yerosheva01microserver.html" }
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