(Enter summary)
Abstract: Accurate cache modeling and analysis are crucial to formally
determine program execution time. Current cache
analysis techniques combine basic block level cache modeling
with explicit or implicit program path analysis. We show
how to extend program and data cache modeling from basic
blocks to program segments thereby increasing the overall
execution time analysis precision. The approach combines
architecture simulation, data flow analysis and implicit path
enumeration.
1. Introduction... (Update)
Context of citations to this paper: More
...segments may contain loops where cache lines are repeatedly replaced by others. Therefore, table comparison alone is not sufficient. In [12] we have presented a preliminary technique which combines local cache tracing with global data flow analysis. In this previous approach...
...and power determination across control structures. It stays conservative because it is a formal approach [9] that is also valid for caches [8]. In this approach, the input data independent program segments are classified as Single Feasible Paths (SFP) They can contain several...
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2: Intervals in software execution cost analysis
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BibTeX entry: (Update)
F. Wolf and R. Ernst. Data flow based cache prediction using local simulation. In Proceedings of the IEEE High Level Design Validation and Test Workshop, pages 155--160, Berkeley, USA, November 2000. http://citeseer.ist.psu.edu/wolf00data.html More
@misc{ wolf00data,
author = "F. Wolf and R. Ernst",
title = "Data flow based cache prediction using local simulation",
text = "F. Wolf and R. Ernst. Data flow based cache prediction using local simulation.
In Proceedings of the IEEE High Level Design Validation and Test Workshop,
pages 155--160, Berkeley, USA, November 2000.",
year = "2000",
url = "citeseer.ist.psu.edu/wolf00data.html" }
Citations (may not include all citations):
1575
Computer Architecture: A Quantitative Approach (context) - Hennessy, Patterson - 1996 ACM
866
Techniques and Tools (context) - Aho, Sethi et al. - 1988
48
Bounding pipeline and instruction cache performance (context) - Healy, Arnold et al. - 1999
42
Performance estimation of embedded software with instruction..
- Li, Malik et al. - 1999 ACM DBLP
35
Embedded program timing analysis based on path clustering an..
- Ye, Ernst - 1997
31
Building an Optimizing Compiler (context) - Morgan - 1998 ACM
31
Efficient worst case timing analysis of data caching
- Kim, Min et al. - 1996 ACM DBLP
29
Analysis of Cache Performance for Operating Systems and Mult.. (context) - Agarwal - 1989 ACM
24
Performance Analysis of Real-Time Embedded Software (context) - Li, Malik - 1999 ACM
15
On predicting data cache behavior for real-time systems (context) - Ferdinand, Wilhelm - 1998
8
Intervals in software execution cost analysis
- Wolf, Ernst - 2000 ACM DBLP
7
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- Hergenhan, Rosenstiel - 2000
4
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1
DINERO Cache Simulator: Code (context) - Hill - 1998
1
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