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Abstract: As the amount of available silicon resources on one chip increases, we have seen the advent of ever increasing parallel resources integrated on-chip. Many architectures use these resources as individually controllable, parallel processing elements. While such architectures excel at parallel applications, they seldom support legacy single-threaded applications. In this work, we propose using parallel resources to facilitate execution of legacy codes with acceptable performance on parallel... (Update)
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BibTeX entry: (Update)
@inproceedings{ wentzlaff.2006.cgo.virtual_architecture,
Author = "David Wentzlaff and Anant Agarwal",
Title = "Constructing Virtual Architectures on a Tiled Processor",
Booktitle = "Proceedings of the Annual International Symposium on Code Generation and Optimization",
Location = "New York, NY",
Month = Mar,
Year = 2006,
url = "citeseer.ist.psu.edu/wentzlaff06constructing.html" }
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