A Framework for Statistical Modeling of Superscalar Processor Performance

A Framework for Statistical Modeling of Superscalar Processor Performance (1997)

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by Derek Noonburg , John Paul Shen

Venue:	Proc. of International Symposium on High Performance Computer Architecture
Citations:	43 - 0 self

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Datum	Value	Source
TITLE	A Framework for Statistical Modeling of Superscalar Processor Performance	INFERENCE
AUTHOR NAME	Derek Noonburg	user correction - Legacy Corrections
AUTHOR AFFIL	Department of Electrical and Computer Engineering; Carnegie Mellon University	user correction - Legacy Corrections
AUTHOR ADDR	Pittsburgh, PA 15213	user correction - Legacy Corrections
AUTHOR NAME	John Paul Shen	user correction - Legacy Corrections
AUTHOR AFFIL	Department of Electrical and Computer Engineering; Carnegie Mellon University	user correction - Legacy Corrections
AUTHOR ADDR	Pittsburgh, PA 15213	user correction - Legacy Corrections
ABSTRACT	This paper presents a statistical approach to modeling superscalar processor performance. Standard trace-driven techniques are very accurate, but require extremely long simulation times, especially as traces reach lengths in the billions of instructions. A framework for statistical models is described which facilitates fast, accurate performance evaluation. A machine model is built up from components: buffers, pipelines, etc. Each program trace is scanned once, generating a set of program parallelism parameters which can be used across an entire family of machine models. The machine model and program parallelism parameters are combined to form a Markov chain. The Markov chain is partitioned in order to reduce the size of the state space, and the resulting linked models are solved using an iterative technique. The use of this framework is demonstrated with two simple processor microarchitectures. The IPC estimates are very close to the IPCs generated by tracedriven simulation of the sam...	user correction - Legacy Corrections
YEAR	1997	INFERENCE
VENUE	Proc. of International Symposium on High Performance Computer Architecture	INFERENCE
VENUE TYPE	CONFERENCE	INFERENCE
PAGES	298--309	INFERENCE
CITATIONS	7 found	ParsCit 1.0