Abstract

Misprediction ofconditional branches is a major cause for reduced performance in processor implementations with large numbers of functional units. We present a hardware scheme which records the path leading to a conditional branch in order to predict the outcome of the branch instruction more accurately. The proposed scheme is ana-lyzed using instruction traces from integer benchmark pro-grams. The results indicate that knowledge of path information leads to better prediction than knowledge of simply the previous branch outcomes for a given number of histoy items. The results further show that even for equivalent hardware cost, path-based correlation often outperforms pattern-based correlation, especially when history information is periodically destroyed, for example, due to context switches. 1