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Novel high-speed and ultra-lowvoltage cmos nand and nor domino gates (2012)
| Venue: | In CENICS 2012: The Fifth International Conference on Advances in Circuits, Electronics and Microelectronics |
| Citations: | 2 - 1 self |
BibTeX
@INPROCEEDINGS{Berg12novelhigh-speed,
author = {Yngvar Berg and Omid Mirmotahari},
title = {Novel high-speed and ultra-lowvoltage cmos nand and nor domino gates},
booktitle = {In CENICS 2012: The Fifth International Conference on Advances in Circuits, Electronics and Microelectronics},
year = {2012},
pages = {5--10}
}
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Abstract
Abstract—In this paper we present novel ultra-low-voltage and high-speed CMOS NAND and NOR gates. For supply voltages below 500mV the delay for an ultra-low-voltage NAND2 gate is approximately 10 % of a complementary CMOS inverter. Furthermore, the delay variations due to mismatch are much lesser than for conventional CMOS. Differential domino gates for AND2/NAND2 and OR2/NOR2 operation are presented. Ultra-low-voltage pass transistors are presented which can be used as latching gates. The ultra-low-voltage gates presented are going to be used for implementation of low-voltage and high speed adders.
Keyphrases
ultra-lowvoltage cmos nand novel high-speed domino gate conventional cmos high-speed cmos nand ultra-low-voltage pas transistor ultra-low-voltage nand2 gate differential domino gate supply voltage high speed adder and2 nand2 or2 nor2 operation delay variation complementary cmos inverter ultra-low-voltage gate
