Abstract

A virtual prototype combines a hardware model with hardware/software cosimulation to support the development and debugging of embedded software before a hardware prototype is available. Existing techniques for hardware /software cosimulation execute the software either on an instruction set simulator for accuracy, or on the simulator host processor for increased performance. On the host processor, timing is either completely ignored or approximated using timing annotations in the code. Although preemption (interrupts) can strongly influence the timing, it is rarely modeled to avoid a performance degrading that would make the virtual prototype unusable, especially for real time signal processing software simulations which is already time consuming as such.

Citations