Statistical Estimation of Circuit Timing Vulnerability Due to Leakage-Induced Power Grid Voltage Drop

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Statistical Estimation of Circuit Timing Vulnerability Due to Leakage-Induced Power Grid Voltage Drop

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by Imad Ferzli University , Imad A. Ferzli

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in IEEE International Conference on Integrated Circuit Design and Technology

BibTeX

@INPROCEEDINGS{University_statisticalestimation,
    author = {Imad Ferzli University and Imad A. Ferzli},
    title = {Statistical Estimation of Circuit Timing Vulnerability Due to Leakage-Induced Power Grid Voltage Drop},
    booktitle = {in IEEE International Conference on Integrated Circuit Design and Technology},
    year = {},
    pages = {17--20}
}

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Abstract

Statistical Vt variations lead to large variations of leakage current, which cause statistical voltage drops on the power grid that can a#ect circuit timing. We propose a statistical analysis technique whereby variances of the leakage currents are used to estimate the susceptibility to timing violations due to leakage-induced voltage drops.

Keyphrases

circuit timing vulnerability due statistical estimation leakage-induced power grid voltage drop ect circuit timing large variation statistical analysis technique statistical vt variation leakage current leakage-induced voltage drop statistical voltage drop power grid

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