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Using a Configurable Processor Generator for Computer Architecture (2009)
| Venue: | Prototyping,” Proceedings of the 42nd Annual IEEE/ACM International Symposium on Microarchitecture |
| Citations: | 3 - 2 self |
BibTeX
@INPROCEEDINGS{Solomatnikov09usinga,
author = {Alex Solomatnikov and Amin Firoozshahian and Ofer Shacham and Zain Asgar and Megan Wachs and Wajahat Qadeer and Stephen Richardson and Mark Horowitz},
title = {Using a Configurable Processor Generator for Computer Architecture},
booktitle = {Prototyping,” Proceedings of the 42nd Annual IEEE/ACM International Symposium on Microarchitecture},
year = {2009}
}
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Abstract
Building hardware prototypes for computer architecture research is challenging. Unfortunately, development of the required software tools (compilers, debuggers, runtime) is even more challenging, which means these systems rarely run real applications. To overcome this issue, when developing our prototype platform, we used the Tensilica processor generator to produce a customized processor and corresponding software tools and libraries. While this base processor was very different from the streamlined custom processor we initially imagined, it allowed us to focus on our main objective—the design of a reconfigurable CMP memory system—and to successfully tape out an 8-core CMP chip with only a small group of designers. One person was able to handle processor configuration and hardware generation, support of a complete software tool chain, as well as developing the custom runtime software to support two different programming models. Having a sophisticated software tool chain not only allowed us to run more applications on our machine, it once again pointed out the need to use optimized code to get an accurate evaluation of architectural features.
Keyphrases
computer architecture configurable processor generator 8-core cmp chip computer architecture research processor configuration complete software tool chain streamlined custom processor real application base processor custom runtime software tensilica processor generator prototype platform accurate evaluation building hardware prototype reconfigurable cmp memory system hardware generation small group optimized code architectural feature customized processor software tool required software tool sophisticated software tool chain
