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Serial LDPC decoding on a SIMD DSP using horizontal-scheduling
| Venue: | In Proc. 14th European Signal Processing Conference (EUSIPCO2006 |
| Citations: | 1 - 1 self |
BibTeX
@INPROCEEDINGS{Gomes_serialldpc,
author = {Marco Gomes and Vitor Silva and Cláudio Neves and Ricardo Marques},
title = {Serial LDPC decoding on a SIMD DSP using horizontal-scheduling},
booktitle = {In Proc. 14th European Signal Processing Conference (EUSIPCO2006},
year = {},
pages = {2006}
}
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Abstract
In this paper we propose an efcient vectorized low den-sity parity check (LDPC) decoding scheme based on the min-sum algorithm and the horizontal scheduling method. Also, the well known forward-backward algorithm, used in the check-node messages update, is improved. Results are presented for 32 and 16 bits logarithm like-lihood ratio messages representation on a high performance and modern xed point DSP. The single instruction multiple data (SIMD) feature was explored in the 16 bits case. Both regular and irregular codes are considered. 1.
