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Hardware-assisted run-time monitoring for secure program execution on embedded processors (2006)
| Venue: | IEEE Trans. Very Large Scale Integr. (VLSI) Syst |
| Citations: | 7 - 0 self |
BibTeX
@ARTICLE{Arora06hardware-assistedrun-time,
author = {Divya Arora and Srivaths Ravi and Senior Member and Senior Member and Niraj K. Jha},
title = {Hardware-assisted run-time monitoring for secure program execution on embedded processors},
journal = {IEEE Trans. Very Large Scale Integr. (VLSI) Syst},
year = {2006},
pages = {1295--1308}
}
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Abstract
Abstract—Embedded system security is often compromised when “trusted ” software is subverted to result in unintended behavior, such as leakage of sensitive data or execution of mali-cious code. Several countermeasures have been proposed in the literature to counteract these intrusions. A common underlying theme in most of them is to define security policies at the system level in an application-independent manner and check for secu-rity violations either statically or at run time. In this paper, we present a methodology that addresses this issue from a different perspective. It defines correct execution as synonymous with the way the program was intended to run and employs a dedicated hardware monitor to detect and prevent unintended program behavior. Specifically, we extract properties of an embedded program through static program analysis and use them as the bases for enforcing permissible program behavior at run time. The processor architecture is augmented with a hardware monitor that observes the program’s dynamic execution trace, checks whether it falls within the allowed program behavior, and flags any deviations from expected behavior to trigger appropriate response mechanisms. We present properties that capture permis-sible program behavior at different levels of granularity, namely inter-procedural control flow, intra-procedural control flow, and instruction-stream integrity. We outline a systematic methodology to design application-specific hardware monitors for any given em-bedded program. Hardware implementations using a commercial design flow, and cycle-accurate performance simulations indicate that the proposed technique can thwart several common software and physical attacks, facilitating secure program execution with minimal overheads. Index Terms—Embedded processors, processor architectures, security and protection, special-purpose and application-based systems. I.
Keyphrases
secure program execution hardware-assisted run-time monitoring embedded processor run time processor architecture intra-procedural control flow application-based system permissible program behavior secu-rity violation cycle-accurate performance simulation hardware monitor dedicated hardware monitor program dynamic execution trace several countermeasure allowed program behavior systematic methodology system level different level em-bedded program minimal overhead present property common underlying theme capture permis-sible program behavior appropriate response mechanism index term physical attack inter-procedural control flow application-specific hardware monitor sensitive data instruction-stream integrity security policy unintended behavior commercial design flow hardware implementation static program analysis abstract embedded system security application-independent manner mali-cious code unintended program behavior different perspective correct execution embedded program several common software
