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Relative timing (2003)

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by Ken Stevens , Ran Ginosar , Shai Rotem
Venue:IEEE Trans. Very Large Scale Integr. (VLSI) Syst
Citations:39 - 17 self
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BibTeX

@ARTICLE{Stevens03relativetiming,
    author = {Ken Stevens and Ran Ginosar and Shai Rotem},
    title = {Relative timing},
    journal = {IEEE Trans. Very Large Scale Integr. (VLSI) Syst},
    year = {2003},
    pages = {129--140}
}

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Abstract

Relative Timing is introduced as an informal method for aggressive asynchronous design. It is demonstrated on three example circuits (C-Element, FIFO, and RAPPID Tag Unit), facilitating transformations from speed-independent circuits to burst-mode, relative timed, and pulse-mode circuits. Relative timing enables improved performance, area, power and testability in all three cases. 1.

Keyphrases

relative timing    speed-independent circuit    relative timing enables    rappid tag unit    pulse-mode circuit    aggressive asynchronous design    example circuit    informal method    relative timed   

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