High Speed Switch Scheduling for Local Area Networks

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High Speed Switch Scheduling for Local Area Networks (1993)

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by Thomas E. Anderson , Susan S. Owicki , James B. Saxe , Charles P. Thacker

Venue:	ACM Transactions on Computer Systems
Citations:	246 - 3 self

BibTeX

@ARTICLE{Anderson93highspeed,
    author = {Thomas E. Anderson and Susan S. Owicki and James B. Saxe and Charles P. Thacker},
    title = {High Speed Switch Scheduling for Local Area Networks},
    journal = {ACM Transactions on Computer Systems},
    year = {1993},
    volume = {11},
    pages = {319--352}
}

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Abstract

Current technology trends make it possible to build communication networks that can support high performance distributed computing. This paper describes issues in the design of a prototype switch for an arbitrary topology point-to-point network with link speeds of up to one gigabit per second. The switch deals in fixed-length ATM-style cells, which it can process at a rate of 37 million cells per second. It provides high bandwidth and low latency for datagram traffic. In addition, it supports real-time traffic by providing bandwidth reservations with guaranteed latency bounds. The key to the switch's operation is a technique called parallel iterative matching, which can quickly identify a set of conflict-free cells for transmission in a time slot. Bandwidth reservations are accommodated in the switch by building a fixed schedule for transporting cells from reserved flows across the switch; parallel iterative matching can fill unused slots with datagram traffic. Finally, we note that pa...

Keyphrases

high speed switch scheduling local area network bandwidth reservation datagram traffic iterative matching unused slot switch deal link speed fixed schedule real-time traffic prototype switch low latency communication network fixed-length atm-style cell guaranteed latency bound high performance high bandwidth conflict-free cell current technology trend time slot arbitrary topology point-to-point network

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