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Prototyping Platform for Dynamic Reconfiguration (2000)
| Venue: | in Proc. 10th Int. Workshop on Field-Programmable Logic and Applications |
| Citations: | 1 - 0 self |
BibTeX
@INPROCEEDINGS{Rissa00prototypingplatform,
author = {Tero Rissa and Tero Kärkkäinen and Jarkko Niittylahti and Timo Yli-pietilä},
title = {Prototyping Platform for Dynamic Reconfiguration},
booktitle = {in Proc. 10th Int. Workshop on Field-Programmable Logic and Applications},
year = {2000},
pages = {371}
}
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Abstract
In this paper, we present an architecture for demonstrating a dynamically reconfigurable system suitable for prototyping the possibilities that dynamic reconfiguration makes available. The developed platform utilizes a novel FPGA architecture in a way where dynamic reconfiguration can be prototyped with various methods and in a wide range of applications. In addition to the highly flexible dynamic reconfiguration, the presented platform includes extensive I/O capacity, the ability to work stand-alone or in PCI bus, a sufficient amount of memory, and a highly flexible clocking scheme. 1. INTRODUCTION Dynamic reconfiguration has long been a vision for being a solution for the high-speed requirements of the tomorrow's digital systems. There are many researchers[1] and corporations[2] that believes that a microprocessor coupled with dynamically reconfigurable hardware is the supercomputer in the future. One of the major problems of this scheme has been a lack of hardware that could be up...
Keyphrases
dynamic reconfiguration introduction dynamic reconfiguration flexible dynamic reconfiguration sufficient amount high-speed requirement developed platform reconfigurable hardware various method wide range digital system many researcher novel fpga architecture presented platform pci bus reconfigurable system major problem
