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A Design Time Simulator for Computer Architects
BibTeX
@MISC{Sudhakrishnan_adesign,
author = {Sangeetha Sudhakrishnan and Francisco-javier Mesa-martinez and Jose Renau},
title = {A Design Time Simulator for Computer Architects},
year = {}
}
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Abstract
Abstract—Processor design and implementation is a complex and resource intensive enterprise. Ideally, designers should be able to quantify the design time implications of their architectural proposals, in order to make more educated decisions and design trade offs. To address the lack of quantitative methodologies to estimate processor design time, this paper introduces a new class of event-driven simulation: µDSim. Our proposed simulation infrastructure models the interaction between engineers during the development and verification cycles. To validate µDSim, we compare estimated design times against data gathered during the development and verification of three different academic processors and three industrial multiprocessor systems. As an example application for the architectural community, we estimate the design time for a previously published architectural proposal. I.
Keyphrases
design time simulator computer architect design time architectural proposal quantitative methodology example application industrial multiprocessor system new class processor design time design time implication different academic processor educated decision resource intensive enterprise verification cycle design trade offs simulation infrastructure model architectural community event-driven simulation abstract processor design
