Symmetric Transparent BIST for RAMs

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Symmetric Transparent BIST for RAMs (1999)

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by V. N. Yarmolik , S. Hellebrand , H.-J. Wunderlich

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BibTeX

@MISC{Yarmolik99symmetrictransparent,
    author = {V. N. Yarmolik and S. Hellebrand and H.-J. Wunderlich},
    title = {Symmetric Transparent BIST for RAMs},
    year = {1999}
}

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Abstract

The paper introduces the new concept of symmetric transparent BIST for RAMs. This concept allows to skip the signature prediction phase of conventional transparent BIST approaches and therefore yields a significant reduction of test time. The hardware cost and the fault coverage of the new scheme remain comparable to that of a traditional transparent BIST scheme. In many cases, experimental studies even show a higher fault coverage obtained in shorter test time.

Keyphrases

symmetric transparent bist fault coverage test time traditional transparent bist scheme hardware cost significant reduction conventional transparent bist approach new concept experimental study new scheme signature prediction phase many case

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