Abstract

The architecture of FPGAs is discussed to see trade-offs between programmable-switch resources in switch-blocks and detailed-routability. For the purpose, FPGAs are assumed to have certain extremal structures. A polynomial time detailed-routing for a given global-routing is presented if the switch-block consists of two or less parallel switch-sets or three that form a cycle. While, the corresponding decision problem is proved to be NP-complete for other FPGAs. A best compromise between switch resources and detailed-routability is offered. 1 Introduction FPGAs are attracting popularity recentyears as addressed from various aspects ([2] and elsewhere). With limited resources for routing, researches of architectures for better performance are still undergoing to make them easier (1) to decide the detailedroutability of a given global-routing and/or (2) to design a detailed-routable global-routing. There have been various considerations [6, 1, 7, 5]. They usually include some proposal...