Synthesis of Asynchronous Control Circuits With Automatically Generated Relative Timing Assumptions

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Synthesis of Asynchronous Control Circuits With Automatically Generated Relative Timing Assumptions (1999)

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by Jordi Cortadella , Michael Kishinevsky , Steven M. Burns , Ken Stevens

Venue:	In Proc. International Conf. Computer-Aided Design (ICCAD
Citations:	8 - 3 self

BibTeX

@INPROCEEDINGS{Cortadella99synthesisof,
    author = {Jordi Cortadella and Michael Kishinevsky and Steven M. Burns and Ken Stevens},
    title = {Synthesis of Asynchronous Control Circuits With Automatically Generated Relative Timing Assumptions},
    booktitle = {In Proc. International Conf. Computer-Aided Design (ICCAD},
    year = {1999},
    pages = {324--331}
}

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Abstract

This paper describes a method of synthesis of asynchronous circuits with relative timing. Asynchronous communication between gates and modules typically utilizes handshakes to ensure functionality. Relative timing assumptions in the form "event a occurs before event b" can be used to remove redundant handshakes and associated logic. This paper presents a method for automatic generation of relative timing assumptions from the untimed specification. These assumptions can be used for area and delay optimization of the circuit. A set of relative timing constraints sufficient for the correct operation of the circuit is back-annotated to the designer. Experimental results for control circuits of a prototype iA32 instruction length decoding and steering unit called RAPPID ("Revolving Asynchronous Pentium R # Processor Instruction Decoder ") shows significant improvements in area and delay over speed-independent circuits. 1 Introduction Asynchronous communication utilizes handshaking to en...

Keyphrases

automatically generated relative timing assumption asynchronous control circuit relative timing assumption speed-independent circuit significant improvement redundant handshake correct operation relative timing constraint asynchronous communication prototype ia32 instruction length decoding form event automatic generation experimental result utilizes handshake introduction asynchronous communication untimed specification relative timing asynchronous circuit control circuit

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