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The Wisconsin Wind Tunnel: Virtual Prototyping of Parallel Computers (1993)
| Venue: | In Proceedings of the 1993 ACM Sigmetrics Conference on Measurement and Modeling of Computer Systems |
| Citations: | 226 - 29 self |
BibTeX
@INPROCEEDINGS{Reinhardt93thewisconsin,
author = {Steven K. Reinhardt and Mark D. Hill and James R. Larus and Alvin R. Lebeck and James C. Lewis and David A. Wood},
title = {The Wisconsin Wind Tunnel: Virtual Prototyping of Parallel Computers},
booktitle = {In Proceedings of the 1993 ACM Sigmetrics Conference on Measurement and Modeling of Computer Systems},
year = {1993},
pages = {48--60}
}
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Abstract
We have developed a new technique for evaluating cache coherent, shared-memory computers. The Wisconsin Wind Tunnel (WWT) runs a parallel sharedmemory program on a parallel computer (CM-5) and uses execution-driven, distributed, discrete-event simulation to accurately calculate program execution time. WWT is a virtual prototype that exploits similarities between the system under design (the target) and an existing evaluation platform (the host). The host directly executes all target program instructions and memory references that hit in the target cache. WWT's shared memory uses the CM-5 memory 's error-correcting code (ECC) as valid bits for a fine-grained extension of shared virtual memory. Only memory references that miss in the target cache trap to WWT, which simulates a cache-coherence protocol. WWT correctly interleaves target machine events and calculates target program execution time. WWT runs on parallel computers with greater speed and memory capacity than uniprocessors. WWT'...
Keyphrases
parallel computer wisconsin wind tunnel virtual prototyping program execution time memory reference virtual prototype shared-memory computer error-correcting code fine-grained extension cache-coherence protocol target program instruction virtual memory evaluation platform discrete-event simulation target cache cm-5 memory target cache trap new technique target machine event parallel sharedmemory program cache coherent memory capacity valid bit
