Integrating Performance Monitoring and Communication in Parallel Computers

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Integrating Performance Monitoring and Communication in Parallel Computers (1996)

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by Margaret Martonosi

Venue:	in Proceedings of the SIGMETRICS International Conference
Citations:	35 - 5 self

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@INPROCEEDINGS{Martonosi96integratingperformance,
    author = {Margaret Martonosi},
    title = {Integrating Performance Monitoring and Communication in Parallel Computers},
    booktitle = {in Proceedings of the SIGMETRICS International Conference},
    year = {1996},
    pages = {138--147}
}

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Abstract

A large and increasing gap exists between processor and memory speeds in scalable cache-coherent multiprocessors. To cope with this situation, programmers and compiler writers must increasingly be aware of the memory hierarchy as they implement software. Tools to support memory performance tuning have, however, been hobbled by the fact that it is difficult to observe the caching behavior of a running program. Little hardware support exists specifically for observing caching behavior; furthermore, what support does exist is often difficult to use for making fine-grained observations about program memory behavior. Our work observes that in a multiprocessor, the actions required for memory performance monitoring are similar to those required for enforcing cache coherence. In fact, we argue that on several machines, the coherence/communication system itself can be used as machine support for performance monitoring. We have demonstrated this idea by implementing the FlashPoint memory performance monitoring tool. FlashPoint is implemented as a special performance-monitoring coherence protocol for the Stanford FLASH Multiprocessor. By embedding performance monitoring into a cache-coherence scheme based on a programmable controller, we can gather detailed, per-data-structure, memory statistics with less than a 10 % slowdown compared to unmonitored program executions. We present results on the accuracy of the data collected, and on how FlashPoint performance scales with the number of processors. 1

Keyphrases

performance monitoring parallel computer several machine memory performance flashpoint memory performance monitoring tool memory statistic stanford flash multiprocessor present result program memory behavior coherence communication system flashpoint performance scale memory hierarchy fine-grained observation cache coherence running program little hardware support scalable cache-coherent multiprocessor gap exists machine support memory performance monitoring unmonitored program execution compiler writer memory speed programmable controller special performance-monitoring coherence protocol cache-coherence scheme

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