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Data-flow transformations to maximize the use of carry-save representation in arithmetic circuits (2008)
| Venue: | IEEE Transactions on ComputerAided Design of Integrated Circuits and Systems |
| Citations: | 16 - 11 self |
BibTeX
@ARTICLE{Verma08data-flowtransformations,
author = {Ajay K. Verma and Philip Brisk and Paolo Ienne},
title = {Data-flow transformations to maximize the use of carry-save representation in arithmetic circuits},
journal = {IEEE Transactions on ComputerAided Design of Integrated Circuits and Systems},
year = {2008}
}
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Abstract
Abstract—The increasing importance of datapath circuits in complex systems-on-chip calls for special arithmetic optimizations. The goal is to automatically achieve the handcrafted results which escape classic logic optimizations. Some work has been done in the recent years to infer the use of the carry-save representation in the synthesis of arithmetic circuits. Yet, many cases of practical interest cannot be handled due to the scattering of logic operations among the arithmetic ones—particularly in arithmetic computations which are originally described at the bit level in high-level languages such as C. We therefore introduce an algorithm to restructure dataflow graphs so that they can be synthesized as high-quality arithmetic circuits, close to those that an expert designer would conceive. On typical embedded software benchmarks which could be advantageously implemented with hardware accelerators, our technique always reduces tangibly the
Keyphrases
arithmetic circuit carry-save representation data-flow transformation dataflow graph recent year datapath circuit arithmetic one practical interest cannot logic operation arithmetic computation complex systems-on-chip call high-quality arithmetic circuit hardware accelerator high-level language software benchmark expert designer bit level classic logic optimization handcrafted result special arithmetic optimization many case
