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Analysis of Power Consumption on Switch Fabrics in Network Routers (2002)
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| Venue: | In Proc. Design Automation Conference |
| Citations: | 89 - 7 self |
BibTeX
@INPROCEEDINGS{Ye02analysisof,
author = {Terry Tao Ye and Luca Benini and Giovanni De Micheli},
title = {Analysis of Power Consumption on Switch Fabrics in Network Routers},
booktitle = {In Proc. Design Automation Conference},
year = {2002},
pages = {524--529}
}
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Abstract
In this paper, we introduce a framework to estimate the power consumption on switch fabrics in network routers. We propose different modeling methodologies for node switches, internal buffers and interconnect wires inside switch fabric architectures. A simulation platform is also implemented to trace the dynamic power consumption with bit-level accuracy. Using this framework, four switch fabric architectures are analyzed under different traffic throughput and different numbers of ingress/egress ports. This framework and analysis can be applied to the architectural exploration for low power high performance network router designs.
Keyphrases
network router power consumption switch fabric switch fabric architecture ingres egress port different traffic throughput architectural exploration node switch different number dynamic power consumption different modeling methodology internal buffer simulation platform interconnect wire bit-level accuracy
